SPICE netlist to WireViz YAML converter with: - Custom lightweight netlist parser (.net/.cir/.sp) - Single-module mapper (subcircuit external interface) - Inter-module mapper (multi-board wiring) - Filter engine with glob patterns - Click CLI with auto-detection, inspection commands - Optional .asc parser via spicelib - Comprehensive test suite with fixtures
41 lines
1.0 KiB
Plaintext
41 lines
1.0 KiB
Plaintext
* Hierarchical netlist with nested subcircuits and global nets
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* Tests continuation lines, parameters, .global directive
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.global VCC GND
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.subckt regulator VIN VOUT GND
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+ ENABLE=1
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R1 VIN N001 100
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C1 N001 GND 10u
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U1 N001 VOUT GND VCC LDO EN=ENABLE
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J1 VIN GND INPUT_CONN
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TP1 VOUT
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.ends regulator
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.subckt sensor_module SDA SCL VCC GND ALERT
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* I2C sensor with pullups and test points
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R_SDA SDA VCC 4.7k
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R_SCL SCL VCC 4.7k
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U1 SDA SCL VCC GND ALERT BME280
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J1 SDA SCL VCC GND ALERT I2C_HDR
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TP1 ALERT
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.ends sensor_module
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.subckt main_board VCC GND SDA SCL ALERT USB_D+ USB_D-
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; Main MCU board with USB and I2C
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U1 VCC GND SDA SCL USB_D+ USB_D- MCU
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J1 USB_D+ USB_D- GND USB_CONN
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J2 SDA SCL VCC GND I2C_CONN
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P1 VCC GND POWER_PLUG
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.ends main_board
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* Top-level system wiring
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X_REG VIN_RAW V3V3 GND regulator ENABLE=1
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X_SENSOR I2C_SDA I2C_SCL V3V3 GND ALERT_SIG sensor_module
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X_MAIN V3V3 GND I2C_SDA I2C_SCL ALERT_SIG USB_DP USB_DM main_board
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* External connectors
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J_PWR VIN_RAW GND BARREL_JACK
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J_USB USB_DP USB_DM GND USB_B_CONN
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TP_3V3 V3V3
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