birdcage/docs/K60-refman-vectors/K60-reference-manual_page_593.svg
Ryan Malloy 5252d1d73c Add hardware reference docs (A3981, K60, RYS352A)
Allegro A3981 stepper motor driver: datasheet, KiCad symbols/footprint,
3D model (TSSOP-28). Two per G2 board, SPI-controlled, AUTO microstep.

NXP MK60DN512VLQ10 (Kinetis K60): datasheet and 1300-page reference
manual. Cortex-M4 96MHz MCU running the G2 firmware.

Reyax RYS352A GPS module: datasheet and PAIR command guide.
GPS receiver on the G2 board (used for auto-location/satellite lookup).

All extracted as markdown + page images + vector SVGs for LLM context.
Binary assets (PDFs, PNGs, SVGs, STEP, WRL) stored via git-lfs.
2026-02-14 18:36:42 -07:00

116 lines
32 KiB (Stored with Git LFS)
XML

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<text xml:space="preserve" transform="matrix(1 0 0 1 54 83)" font-size="16" font-family="HelveticaLTStd" font-weight="bold"><tspan y="12.65625" x="0 8.896001 17.792002 22.240002 31.136002 35.584005">25.5.2</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 112.65332 83)" font-size="16" font-family="HelveticaLTStd" font-weight="bold"><tspan y="12.65625" x="0 11.552001 20.448002 24.896002 34.672 44.448 48.896005 57.792005 62.240007 71.13601 80.03201 84.48001 93.376018 102.27202 111.16802 115.61602 124.512027 136.06403 144.06403 148.51203 154.73603 163.63202 168.96002 177.85602 184.08002 192.97602 202.75202 211.64801">Using a 32.768 kHz reference</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 54)" font-size="14" font-family="TimesLTStd"><tspan y="66.25" x=".00201 4.66401 11.66401 15.16401 22.948012 31.50201 40.05601 43.55601 49.77201 56.77201 63.77201 67.27201 75.056018 84.39401 92.94801 96.44801 107.34001 114.34001 121.34001 127.556018 133.00202 136.50202 140.00202 143.89402 148.55602 152.05602 159.05602 164.50202 168.39402 175.39402 182.39402 185.89402 192.11002 195.61002 202.61002 209.61002 213.11002 220.11002 227.11002 234.11002 237.61002 244.61002 254.71802 260.93403 264.43403 270.65003 277.65003 281.54203 287.75804 292.42 299.42 305.63603 309.528 313.028 317.69 323.906 328.568 334.784 339.44599 345.662 352.662 358.878 365.094 368.594 372.094 378.31 382.202 385.702 389.594 396.594 402.81 406.31 413.31 419.526 424.188 430.404 437.404 441.296 445.188 448.688 456.472 465.02598">In FEE and FBE modes, if using a 32.768 kHz external reference, at the default FLL</tspan><tspan y="82.25" x=".00202 10.894021 17.89402 21.78602 25.67802 29.57002 36.570024 40.462026 44.354028 50.570028 56.786027 60.67803 64.57003 71.57003 78.57003 82.07003 86.73203 92.94804 99.16404 103.05604 110.05604 114.71804 118.21804 125.21804 129.88004 133.38004 140.38004 147.38004 154.38004 157.88004 161.38004 165.27204 172.27204 178.48804 181.98804 192.09604 201.43404 211.54204 215.04204 222.04204 229.04204 232.93404 239.93404 246.93404 250.82604 254.32604 258.98805 271.43406 280.77207 290.88008 298.66407 307.21806 315.77204 325.11006 333.66404 343.77204 348.43403 351.93403 356.596 361.258 367.474 374.474 381.474 387.69 394.69 400.906 407.906 411.406 415.298 420.74403 424.24403 431.24403 438.24403 441.74403 448.74403 455.74403 459.24403 471.69004 481.79804 488.01405 491.51405 497.73005">multiplication factor of 640, the DCO output (MCGFLLCLK) frequency is 20.97 MHz at</tspan><tspan y="98.25" x=".00202 3.8940204 10.89402 21.002022 25.664023 30.326024 36.542024 43.542024 50.542024 56.758024 60.258024 63.758024 68.42002 73.08202 76.58202 85.92003 92.92003 97.58203 107.69003 117.02803 124.812038 133.36603 140.36603 150.47403 159.81203 167.59603 172.25803 175.75803 182.75803 186.65003 190.54203 195.98802 199.48802 205.70403 210.36603 216.58203 220.08203 225.52803 231.74404 235.63603 239.13603 243.02803 250.02803 253.52803 260.528 263.048 270.048 277.048 284.048 287.548 291.048 294.94 301.94 308.156 311.656 322.548 329.548 333.44 337.332 341.224 348.224 352.116 356.008 362.224 368.44 372.332 376.224 383.224 390.224 393.724 398.386 404.602 410.818 414.71 421.71 426.37199 429.87199 433.76399 439.21 442.71 449.71 456.71 463.71 470.71 474.602 480.818 487.818 491.318 495.21">low-range. If C4[DRST_DRS] bits are set to 2'b01, the multiplication factor is doubled to</tspan><tspan y="114.25" x=".00202 7.00202 14.00202 21.00202 28.00202 31.50202 35.00202 41.21802 48.21802 55.21802 58.71802 62.610025 69.61002 75.82603 79.32603 83.98803 90.20403 95.65003 102.65003 106.54203 110.43403 114.32603 121.32603 128.32602 131.82602 141.93402 151.27202 161.38002 164.88002 171.88002 178.88002 182.77202 189.77202 196.77202 200.66402 204.16402 208.82602 213.48802 219.70403 226.70403 233.70403 239.92003 246.92003 253.13603 260.13606 263.63606 267.52806 272.97407 276.47407 283.47407 290.47407 293.97407 300.97407 307.97407 311.47407 323.92008 334.02809 340.24409 343.74409 349.96009 353.85209 357.35209 368.24409 372.13609 379.13609 383.79808 387.69007 394.69007 404.79808 409.46006 414.12205 420.33805 427.33805 434.33805 440.55406 444.05406 447.55406 452.21604">1280, and the resulting DCO output frequency is 41.94 MHz at mid-low-range. If</tspan><tspan y="130.25" x=".00202 9.340021 16.340022 21.002022 31.110024 40.448026 48.232027 56.786027 63.786027 73.89403 83.232028 91.01603 95.67803 99.17803 106.17803 110.07003 113.96203 119.40803 122.90803 129.12403 133.78603 140.00203 143.50203 148.94803 155.16403 159.05603 162.55603 166.44803 173.44803 176.94803 183.94803 186.46804 193.46804 200.46804 207.46804 210.96804 214.46804 218.36003 225.36003 231.57604 235.07604 245.96804 252.96804 256.86006 260.75205 264.64405 271.64405 275.53605 279.42805 285.64405 291.86006 295.75205 299.64405 306.64405 313.64405 317.14405 321.80604 328.02204 334.23805 338.13005 345.13005 349.79203 353.29203 357.18403 362.63005 366.13005 371.57606 377.79206 381.68406 385.18406 389.07606 396.07606 399.57606 406.57606 413.57606 420.57606 427.57606 431.07606 434.57606 440.79206 447.79206 454.79206 458.29206 462.18406 469.18406">C4[DRST_DRS] bits are set to 2'b10, the multiplication factor is set to 1920, and the</tspan><tspan y="146.25" x=".00202 4.66402 10.88002 16.326022 23.326022 27.218022 31.110022 35.00202 42.00202 49.00202 52.50202 62.610025 71.94803 82.05603 85.55603 92.55603 99.55603 103.44803 110.44803 117.44803 121.34003 124.84003 129.50203 134.16403 140.38004 147.38004 154.38004 160.59604 167.59604 173.81204 180.81204 184.31204 188.20404 193.65004 197.15004 204.15004 211.15004 214.65004 221.65004 228.65004 232.15004 244.59604 254.70404 260.92005 264.42005 270.63606 274.52806 278.02806 288.92005 292.81205 299.81205 303.31205 310.31205 314.20405 321.20405 328.20405 332.86604 337.528 343.74403 350.74403 357.74403 363.96003 367.46003 370.96003 375.622 380.284 383.784 393.122 400.122 404.784 414.892 424.23 432.014 440.568 447.568 457.676 467.014 474.798 479.46 482.96 489.96 493.852 497.744">resulting DCO output frequency is 62.91 MHz at mid high-range. If C4[DRST_DRS] bits</tspan><tspan y="162.25" x=".00202 6.2180206 10.88002 17.09602 20.59602 26.04202 32.258024 36.150026 39.650026 43.542028 50.542028 54.042028 61.042028 63.562028 70.56203 77.56203 84.56203 88.06203 91.56203 95.454029 102.454029 108.67003 112.17003 123.06203 130.06203 133.95403 137.84603 141.73802 148.73802 152.63002 156.52202 162.73802 168.95403 172.84603 176.73802 183.73802 190.73802 194.23802 198.90003 205.11603 211.33203 215.22403 222.22403 226.88603 230.38603 234.27803 239.72403 243.22403 248.67003 254.88603 258.77806 262.27806 266.17005 273.17005 276.67005 283.67005 290.67005 297.67005 304.67005 308.17005 311.67005 317.88606 324.88606 331.88606 335.38606 339.27806 346.27806 352.49406 355.99406 360.65605 366.87205 372.31806 379.31806 383.21006 387.10206 390.99406 397.99406 404.99406 408.49406 418.60206 427.94007 438.04808 441.54808 448.54808 455.54808 459.44007 466.44007 473.44007">are set to 2'b11, the multiplication factor is set to 2560, and the resulting DCO output</tspan><tspan y="178.25" x=".00202 4.66402 9.32602 15.542021 22.54202 29.54202 35.758024 42.758024 48.974023 55.974023 59.474023 63.366025 68.81203 72.31203 79.31203 86.31203 89.81203 96.81203 103.81203 107.31203 119.758029 129.86603 136.08203 139.58203 145.79804 149.69004 153.19004 160.19004 164.08203 171.08203 178.08203 182.74404 187.40604 193.62204 200.62204 207.62204 213.83805">frequency is 83.89 MHz at high-range.</tspan><tspan y="202.65" x=".00203 4.66403 11.66403 15.16403 22.94803 32.286035 36.948034 40.448034 46.664033 53.664033 60.664033 64.16403 71.94804 80.50204 85.16404 88.66404 99.55604 106.55604 113.55604 119.77204 125.21804 128.71805 132.21805 137.66405 143.88005 147.77205 151.66405 155.55605 162.55605 169.55605 173.05605 182.39405 189.39405 194.05605 204.16405 216.61005 226.71805 233.71805 240.71805 245.38005 248.88005 255.88005 259.77207 263.66407 267.16407 271.05607 276.50209 280.00209 287.00209 294.00209 297.89408 301.39408 306.05607 312.27207 318.48808 325.48808 336.38008 347.27207 353.48808 360.48808 367.48808 373.70408 380.70408 384.20408 387.70408 392.36607 397.02806 400.52806 404.42005 411.42005 417.63606 421.13606 425.02806 432.02806 435.92005 442.13606 446.79804 453.79804 460.01405">In FBI and FEI modes, setting C4[DMX32] bit is not recommended. If the internal</tspan><tspan y="218.65" x=".00202 4.66402 10.88002 15.542021 21.758023 26.420023 32.636026 39.636026 45.852025 52.068025 55.568025 59.460027 64.90603 68.40603 72.29803 76.96003 80.85203 91.744029 102.636028 108.85203 115.85203 119.35203 123.244029 130.24402 133.74402 139.96002 143.46002 148.12203 152.78403 159.00003 166.00003 173.00003 179.21604 186.21604 192.43204 199.43204 202.93204 209.14804 216.14804 223.14804 230.14804 236.36405 239.86405 246.86405 253.86405 257.36405 264.36405 271.36405 278.36405 281.86405 288.86405 298.97206 305.18806 308.68806 312.18806 316.08006 323.08006 329.29606 332.79606 339.79606 344.45805 350.67405 356.89006 360.78205 366.99806 371.66004 375.16004 382.94404 391.49803 400.052 403.552 414.444 421.444 425.336 429.228 433.12 440.12 444.012 447.904 454.12 460.336 464.228 468.12 475.12">reference is trimmed to a frequency above 32.768 kHz, the greater FLL multiplication</tspan><tspan y="234.65" x=".00202 4.66402 10.88002 17.09602 20.98802 27.98802 32.65002 36.15002 42.36602 49.36602 56.36602 60.258024 67.258029 70.758029 77.758029 84.758029 88.650028 94.86603 101.86603 105.758029 109.650028 115.86603 119.758029 123.650028 130.65003 134.15003 141.15003 148.15003 153.59603 160.59603 164.09603 167.98802 174.98802 181.20403 184.70403 195.59603 199.48802 205.70403 210.36603 217.36603 223.58203 230.58203 237.58203 241.47403 246.13603 253.13603 257.02806 260.92005 267.13606 271.79804 275.29804 280.74406 287.74406 293.19007 297.08207 303.29808 314.19007 317.69007 323.90608 327.79808 334.79808 341.01408 348.01408 351.51408 358.51408 365.51408 369.40608 372.90608 379.90608 384.56806 388.06806 393.51408 400.51408 406.73008 412.94609 416.83808 421.50007 425.39207 431.60807 437.82408 441.71607 445.60807 452.60807 459.60807 463.10807 469.32408 476.32408">factor could potentially push the microcontroller system clock out of specification and</tspan><tspan y="250.65" x=".00202 7.00202 13.21802 24.110022 30.326024 37.326025 43.542024 47.042024 50.934026 57.934026 64.150028 67.650028 74.650028 80.86603 85.52803 89.42003">damage the part.</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 346.19999)" font-size="16" font-family="HelveticaLTStd" font-weight="bold"><tspan y="12.65625" x="-.00798 8.8880209 17.784022 22.232022 31.128022 35.576025">25.5.3</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 112.65332 346.19999)" font-size="16" font-family="HelveticaLTStd" font-weight="bold"><tspan y="12.65625" x="-.00798 13.320021 24.87202 37.320024 41.768026 55.992029 65.76803 75.54403 84.44003 88.88803 97.784038 110.23203 114.68003 120.00803 128.90404 138.68004 143.12804 152.90404">MCG mode switching</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 54)" font-size="14" font-family="TimesLTStd"><tspan y="329.44999" x=".00003 13.21603 20.21603 26.43203 33.43203 36.93203 42.37803 52.48603 56.378034 60.270036 66.48604 73.48604 77.37804 84.37804 91.37804 94.87804 101.87804 108.09404 111.98604 122.09404 128.31005 134.52605 141.52605 145.02605 152.02605 159.02605 165.24205 169.90406 176.12006 180.01206 183.90406 190.90406 197.90406 204.12006 208.01206 211.51206 222.40406 229.40406 236.40406 242.62006 248.06606 251.56606 258.56605 263.22804 266.72804 270.62004 277.62004 283.83604 287.33604 299.78205 309.12007 319.22807 322.72807 326.22807 332.44407 338.66007 343.32206 347.21406 353.43006 357.32206 364.32206 367.82206 374.03807 381.03807 388.03807 392.70005 396.59205 403.59205 410.59205 415.25404 421.47004 425.36204 429.25404 436.25404 443.25404 446.75404 453.75404 457.64604 461.53804 466.98405 470.48405 481.37605 488.37605 493.82206">When switching between operational modes of the MCG, certain configuration bits must</tspan><tspan y="345.44999" x=".00006 7.00006 13.216061 16.71606 22.93206 29.93206 36.14806 43.14806 50.14806 56.36406 63.36406 66.86406 70.75606 77.75606 81.25606 88.25606 92.91806 99.91806 106.13406 110.79607 114.29607 118.188068 125.188068 128.68807 135.68807 140.35007 147.35007 154.35007 160.56607 165.22808 169.12007 176.12007 179.62007 190.51207 197.51207 204.51207 210.72808 214.22808 218.89008 223.55208 230.55208 241.44408 244.94408 251.94408 258.9441 265.1601 268.6601 279.5521 286.5521 293.5521 299.7681 303.2681 307.1601 314.1601 317.6601 323.8761 330.8761 337.8761 341.7681 348.7681 354.9841 359.6461 363.1461 366.6461 375.20008 381.41609 387.63209 394.63209 398.13209 402.02409 405.91609 416.80809 423.02409 426.52409 432.74009 439.74009 446.74009 450.24009 457.24009 461.90208 465.40208 469.29408 476.29408 482.51008 487.9561">be changed in order to properly move from one mode to another. Each time any of these</tspan><tspan y="361.44999" x=".00006 7.00006 10.89206 14.7840609 20.23006 23.73006 29.94606 34.60806 40.82406 44.32406 50.54006 57.54006 63.756059 70.75606 77.75606 83.97206 90.97206 94.47206 99.13406 108.47206 115.47206 120.13406 127.91807 136.47206 145.02606 152.81006 157.47206 160.97206 164.47206 173.81006 180.81006 185.47206 190.13407 199.47206 208.02606 215.81006 223.59406 228.25606 231.75606 235.25606 244.59406 251.59406 256.25605 265.59407 274.14805 284.25605 292.04005 296.70204 300.20204 303.70204 313.04005 320.04005 324.70204 329.364 338.70204 348.04005 355.82405 360.48603 363.98603 367.48603 374.48603 379.148 382.648 391.98603 398.98603 403.648 412.202 421.54 430.094 437.878 445.662 452.662 457.32398 461.98597 465.48597 468.98597 472.87797 479.87797">bits are changed (C6[PLLS], C1[IREFS], C1[CLKS], C2[IRCS], or C2[EREFS0]), the</tspan><tspan y="377.44999" x=".00006 6.2160608 13.216061 17.878062 22.540062 28.756062 34.20206 41.20206 48.20206 55.20206 62.20206 66.09406 73.09406 80.09406 83.59406 90.59406 94.48606 98.37806 103.82406 107.32406 111.21606 118.21606 121.71606 125.608058 132.60807 138.82407 142.32407 154.77007 164.10807 174.21607 177.71607 183.16207 187.05406 193.27007 197.16207 204.16207 209.60807 213.10807 217.77007 223.98607 230.98607 234.87807 240.32407 244.21607 250.43207 255.09407 258.59407 263.25605 271.04005 279.59403 288.148 295.932 304.486 307.986 311.486 316.14799 325.486 334.03999 341.82398 349.60798 358.16197 361.66197 365.16197 374.49998 383.05397 393.16197 400.94596 409.49995 412.99995 416.49995 421.16194 430.49995 439.83796 447.62196 456.17594 459.67594 463.17594 470.17594">corresponding bits in the MCG status register (PLLST, IREFST, CLKST, IRCST, or</tspan><tspan y="393.44999" x=".00010999999 10.10811 17.89211 27.230113 31.892113 42.000116 46.662115 55.216115 59.878114 63.378114 74.27011 81.27011 86.71611 90.60811 94.10811 101.10811 107.32411 110.82411 117.040119 124.040119 130.25612 136.47212 143.47212 149.68813 156.68813 160.18813 167.18813 173.40413 178.06613 185.06613 189.72814 195.94414 199.44414 210.33614 217.33614 224.33614 228.22814 235.22814 242.22814 245.72814 252.72814 259.72816 263.22816 267.12016 274.12016 277.62016 281.51216 288.51216 294.72816 298.22816 304.44416 311.44416 318.44416 322.33616 326.22816 332.44416 338.66017 342.55216 346.44416 353.44416 360.44416 363.94416 369.39018 376.39018 381.05216 384.94416 395.05216 401.26817 405.93016 412.14616">OSCINIT) must be checked before moving on in the application software.</tspan><tspan y="417.84999" x=".00013999999 10.108141 17.10814 24.10814 28.000142 31.892142 35.78414 42.78414 49.78414 56.00014 59.892145 63.784147 70.78415 74.28415 77.78415 84.00015 90.216159 94.87816 101.09416 104.59416 115.48616 122.48616 127.93216 131.82416 135.32416 142.32416 148.54016 152.04016 155.93216 162.14817 169.14817 175.36417 182.36417 185.86417 189.75617 196.75617 200.25617 206.47217 213.47217 218.91817 225.91817 230.58017 236.79618 240.29618 244.18817 251.18817 257.40419 261.29618 264.79618 268.68818 275.68818 281.90419 285.40419 290.06617 296.28218 300.94416 307.16017 311.82215 318.03816 325.03816 331.25416 337.47016 340.97016 347.18617 351.07817 358.07817 364.29417 371.29417 374.79417 381.79417 385.68617 392.68617 396.57817 403.57817 409.79417 414.45616 417.95616 422.61814 431.95616 438.95616 443.61814 451.40214 460.74015 470.84815 475.51014 485.61814">Additionally, care must be taken to ensure that the reference clock divider (C1[FRDIV]</tspan><tspan y="433.84999" x=".00010999999 6.2161109 13.21611 20.21611 23.71611 33.05411 40.05411 44.71611 52.50011 61.83811 71.94611 76.608119 86.71612 93.71612 98.37812 103.04012 106.54012 110.43212 115.87812 119.37812 124.82412 131.04012 134.93212 138.43212 145.43212 150.09412 157.09412 164.09412 170.31012 174.97212 178.86412 185.86412 189.36412 194.02613 201.02613 205.68813 209.18813 213.08013 220.08013 226.29613 229.79613 240.68813 247.68813 254.68813 260.9041 264.4041 271.4041 277.62013 281.51213 288.51213 295.51213 299.01213 304.45814 314.56614 318.45814 322.35014 328.56614 335.56614 341.78215 348.78215 352.28215 356.17414 363.17414 366.67414 370.17414 377.95814 384.95814 389.62013 393.12013 397.01213 404.01213 409.45814 413.35014 419.56614 426.56614 432.78215 438.99815 442.49815 445.99815 449.89015 456.89015 460.39015 468.17414 476.72813">and C5[PRDIV0]) is set properly for the mode being switched to. For instance, in PEE</tspan><tspan y="449.84999" x=".00010999999 10.892111 17.89211 24.89211 31.108113 34.608114 38.108114 42.000116 46.662115 50.162115 57.162115 62.608114 66.500118 73.500118 80.500118 84.000118 90.21612 93.71612 100.71612 104.21612 116.66212 126.77012 132.98612 136.48612 142.70212 147.36412 154.36412 159.81012 163.70212 169.91812 173.81012 177.31012 180.81012 190.14812 197.14812 201.81012 209.59412 218.93212 229.04012 233.70212 243.81012 250.81012 255.47212 258.9721 269.8641 276.8641 282.31013 286.20213 289.70213 296.70213 302.91813 306.41813 311.86415 318.08015 321.97215 325.47215 329.36415 336.36415 339.86415 346.86415 349.38414 356.38414 363.38414 370.38414 377.38414 380.88414 385.5461 392.5461 396.4381 403.4381 407.3301 414.3301 420.5461 425.2081 432.2081 439.2081 443.8701 450.8701 455.53208 459.03208 466.03208">mode, if using a 4 MHz crystal, C5[PRDIV0] must be set to 5'b000 (divide-by-1) or</tspan><tspan y="465.84999" x=".00010999999 7.00011 9.52011 16.520112 23.520112 30.520112 37.52011 41.02011 45.68211 52.68211 56.574113 63.574113 67.46611 74.46611 80.68211 84.18211 88.84412 95.84412 102.84412 107.50612 114.50612 119.16812 122.66812 126.56012 133.56012 137.06012 144.06012 147.95212 154.95212 158.84412 165.84412 172.06012 175.56012 179.45212 186.45212 192.66812 196.16812 202.38413 209.38413 213.27613 219.49213 224.15413 231.15413 237.37014 241.26213 244.76213 249.42414 255.64014 260.30213 266.51814 271.1801 277.39613 284.39613 290.61213 296.82814 300.32814 307.32814 314.32814 324.43614 331.43614 334.93614 338.82814 345.82814 349.32814 353.22013 360.22013 366.43614 369.93614 374.5981 380.81413 387.81413 394.81413 398.70613 403.3681 409.5841 416.5841 420.0841 424.7461 429.40809 435.62409 442.62409 449.62409 455.8401 462.8401 469.0561">5'b001 (divide -by-2) to divide the external reference down to the required frequency</tspan><tspan y="481.84999" x=".00010999999 7.00011 13.21611 17.10811 27.21611 33.43211 39.64811 46.64811 50.14811 57.14811 60.64811 66.86411 73.86411 80.86411 84.36411 91.36411 94.86411 107.31011 117.41811 123.63412">between 2 and 4 MHz.</tspan><tspan y="506.24998" x=".00010999999 4.6621105 11.66211 15.16211 22.946112 32.28411 40.83811 44.33811 47.83811 55.622114 64.17611 72.73011 76.23011 79.73011 87.514118 96.85211 101.514118 105.014118 108.514118 114.73012 121.73012 128.73012 132.23012 140.01412 148.56812 153.23012 156.73012 167.62212 174.62212 181.62212 187.83812 193.28412 196.78412 200.28412 206.50012 210.39212 213.89212 220.10813 227.10813 234.10813 237.60813 241.50012 245.39212 256.28413 262.50013 266.00013 269.50013 273.39213 280.39213 286.60813 290.10813 296.32414 303.32414 310.32414 314.21614 318.10813 324.32414 330.54014 334.43214 338.32414 345.32414 352.32414 355.82414 362.04014 368.25614 375.25614 378.75614 384.20216 394.31016 398.20216 402.09416 408.31016 415.31016 418.81016 422.70216 429.70216 435.91816 439.41816 447.20216 455.75614">In FBE, FEE, FBI, and FEI modes, at any time, the application can switch the FLL</tspan><tspan y="522.24996" x=".00010999999 10.892111 17.89211 21.784111 25.676112 29.568112 36.56811 40.460115 44.352117 50.568117 56.784116 60.676118 64.568119 71.568119 78.568119 82.068119 86.73012 92.94612 99.162128 103.05412 110.05412 114.716129 118.216129 125.216129 131.43213 135.32413 145.43213 151.64813 157.86414 164.86414 168.36414 175.36414 182.36414 189.36414 192.86414 196.36414 203.36414 210.36414 217.36414 224.36414 227.86414 231.36414 238.36414 245.36414 252.36414 259.36415 262.86415 266.36415 272.58015 279.58015 286.58015 290.08015 297.08015 304.08015 311.08015 318.08015 321.58015 331.68815 335.58015 339.47215 346.47215 349.97215 359.31016 366.31016 370.97215 381.08015 390.41816 398.20216 406.75614 413.75614 423.86415 433.20216 440.98616 445.64814 449.14814 456.14814 460.04014 463.93214 469.37815">multiplication factor between 640, 1280, 1920, and 2560 with C4[DRST_DRS] bits.</tspan><tspan y="538.24996" x=".00010999999 13.21611 17.87811 21.770112 25.662112 31.878113 37.324113 40.824113 44.716115 51.716115 55.216115 64.554119 71.554119 76.21612 86.32412 95.662128 103.44613 112.00013 119.00013 129.10813 138.44612 146.23012 150.89212 154.39212 161.39212 165.28412 169.17612 174.62212 178.12212 188.23012 192.12212 196.01412 199.90612 203.40612 210.40612 216.62212 220.12212 224.01412 231.01412 238.01412 245.01412 249.67612 255.89212 262.89213 266.39213 270.28413 274.9461 278.4461 287.78413 294.78413 299.4461 308.0001 315.7841 320.44609 328.34208 335.34208">Writes to C4[DRST_DRS] bits will be ignored if C2[LP]=1.</tspan><tspan y="562.64999" x=".00013999999 8.55414 15.55414 21.770142 25.270142 29.162142 35.378145 42.378145 46.270147 52.486146 55.986146 62.986146 69.20215 73.09415 80.09415 90.20215 93.70215 99.14815 106.14815 113.14815 123.25615 128.70215 132.20215 144.64815 153.98615 164.09415 174.20215 184.31015 192.86415 202.20215 210.75615 220.86415 224.36415 229.02616 233.68816 239.90416 246.90416 253.90416 260.12016 267.12016 273.33616 280.33616 283.83616 290.05216 296.26817 300.16017 306.37617 313.37617 317.26817 323.48417 327.37617 331.26817 338.26817 345.26817 350.71418 354.21418 361.21418 366.6602 370.5522 377.5522 384.5522 388.0522 397.3902 404.3902 409.0522 416.83619 426.1742 436.2822 440.94419 451.0522 455.71418">The table below shows MCGOUTCLK frequency calculations using C1[FRDIV],</tspan><tspan y="578.64999" x=".00010999999 9.338111 16.338112 21.000113 28.784113 38.122117 48.230119 52.892118 63.00012 70.00012 74.662128 78.162128 81.662128 87.87813 94.87813 101.87813 105.37813 114.716129 121.716129 126.37813 136.48613 146.59413 151.25614 161.36414 168.36414 173.02614 176.52614 181.97214 188.18814 192.08014 195.97214 199.86414 206.86414 213.86414 219.31014 222.81014 227.47214 234.47214 239.13414 242.63414 248.85015 255.06615 261.28215 268.28215 271.78215 277.99815 281.89015 288.89015 295.10615 302.10615 305.60615 316.49815 323.49815 330.49815 336.71415">C5[PRDIV0], and C6[VDIV0] settings for each clock mode.</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 54 18)" font-size="9" font-family="HelveticaLTStd" font-weight="bold"><tspan y="26.01031" x="296.469 302.96699 308.46598 313.46998 318.96897 321.96598 326.96998 330.47099 332.973 337.977 342.981 345.483 352.98 358.479 360.98103 363.97804 366.48005 371.97904 377.47804 380.97904 386.47804 391.97703 396.98103 401.98503 404.48704 410.98503 413.48704 418.98603 423.99003 428.99403 431.49604 438.49806 443.50205 449.00105 454.00505 457.50605 462.51005 465.50706 471.00605 474.50706 477.00907 480.00608 487.50309 494.00108 501.00309">Chapter 25 Multipurpose Clock Generator (MCG)</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 734.93869)" font-size="10" font-family="HelveticaLTStd" font-weight="bold"><tspan y="8.59766" x="130.01 137.23 142.79 148.34999 151.12999 157.79999 163.90999 170.01999 173.34999 179.45999 185.01999 193.90999 196.68999 199.46999 205.02999 207.80998 215.02999 220.58998 223.91999 229.47998 233.36998 238.92998 245.03998 250.59998 256.15998 258.93998 267.26997 272.82997 278.93995 285.04994 290.60993 293.38993 296.16993 298.94993 306.16993 311.72993 317.28993 320.06993 322.8499 328.4099 331.1899 336.7499 342.8599 348.96989 351.74989 357.30989 362.86988 368.42988">K60 Sub-Family Reference Manual, Rev. 2 Jun 2012</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 751.756)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x=".00401 5.5030105 8.5000109 13.504011 18.50801 23.00801 27.50801 32.512014 34.510015 39.514017 42.016016 48.019014 53.023015 60.520017 62.518018 67.01802 72.02202 77.02602 82.030017 87.03401 91.53401 94.03601 99.04001 102.03701 104.53901 107.04101 109.54301 114.547008 119.047008">Freescale Semiconductor, Inc.</tspan></text>
<text fill="#ff0000" xml:space="preserve" transform="matrix(1 0 0 1 220.32 751.756)" font-size="10" font-family="HelveticaLTStd" font-weight="bold"><tspan y="8.59766" x="58.45 65.12 69.01 74.57 77.35 80.13 89.02 91.799999 97.909999 103.46999 107.35999">Preliminary</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 391.68 751.756)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="151.308 156.312 161.316">593</tspan></text>
<text fill="#ff0000" xml:space="preserve" transform="matrix(1 0 0 1 54 763.756)" font-size="10" font-family="HelveticaLTStd" font-weight="bold"><tspan y="8.59766" x="180.87 188.65 194.20999 200.31999 205.87999 209.76999 215.32999 218.10999 220.88999 228.10999 234.21999 239.77999 242.55998 248.66999 254.22998 259.78999 265.34999 268.12998 270.90998 277.01997 280.34996 286.45994 290.34996 299.23997 304.79997 308.12995 310.90995 317.01994">General Business Information</tspan></text>
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