Allegro A3981 stepper motor driver: datasheet, KiCad symbols/footprint, 3D model (TSSOP-28). Two per G2 board, SPI-controlled, AUTO microstep. NXP MK60DN512VLQ10 (Kinetis K60): datasheet and 1300-page reference manual. Cortex-M4 96MHz MCU running the G2 firmware. Reyax RYS352A GPS module: datasheet and PAIR command guide. GPS receiver on the G2 board (used for auto-location/satellite lookup). All extracted as markdown + page images + vector SVGs for LLM context. Binary assets (PDFs, PNGs, SVGs, STEP, WRL) stored via git-lfs.
2334 lines
178 KiB (Stored with Git LFS)
XML
2334 lines
178 KiB (Stored with Git LFS)
XML
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<text xml:space="preserve" transform="matrix(1 0 0 1 54 54)" font-size="12" font-family="HelveticaLTStd" font-weight="bold"><tspan y="10.3" x="141.32399 151.31999 159.984 169.31999 175.99199 184.65599 191.32799 194.66399 198.65999 201.99599 208.66799 212.00399 219.33599 222.67198 230.00399 236.67598 243.34798 250.01998 254.68798 258.024 265.356 269.352 272.688 280.02 287.352 294.024 297.36 301.356 308.02799 315.36 322.692 326.688 330.024 337.356 344.688 351.36 358.692">MCG_C6 field descriptions (continued)</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 131.85 90.182819)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 6.4980008 11.502001 14.004002 19.008004 22.005003 29.502003 31.500004 36.504007 41.508008 46.008008 48.510007 50.508008 53.010007 55.512006 60.516008 65.520008 68.022 70.020008 75.024 77.526 82.53 85.527 88.524 93.528 98.532 101.034 103.535999 106.533 111.536998 116.54099 121.54499 126.54899 131.04898 133.55098 136.05298 138.05098 142.55098 145.05298 152.54998 157.55397 162.55797 167.56197 170.06397 172.56597 177.56996 179.56797 181.56597 186.56996 193.06797 195.06597 200.06996 205.07396 207.57596 212.57996 215.08196 217.07996 222.08396 226.58396 231.08396 233.58596 238.58995 241.09195 243.59395 245.59195 250.59595 255.09595 259.59596 262.09797 264.09596 269.09996 274.10395 276.10194 280.60194 285.60594 288.10795 290.10594 295.10993 300.11393 302.61595 305.11796 310.61695 315.62095 317.61894 322.11894 324.62095 329.62495 331.62294 334.12495 336.62696 341.63096 346.63496 348.63294 353.13294 355.63496 360.63896 365.64295 370.14295 372.64497 377.64897 382.65296 385.15498 390.15898 392.66099 395.163 400.167 404.667">Determines if an interrupt request is made following a loss of lock indication. This bit only has an effect</tspan><tspan y="18.83789" x=".00004 6.4980409 11.502041 16.506043 21.510045 24.012045 29.016045 36.018045 41.022047 47.025049 49.527048 54.531049 57.033048 59.031049 63.531049 66.03305 70.53305 75.53705 78.03905">when LOLS 0 is set.</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 131.85 122.182819)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x=".00004">0</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 131.85 133.18282)" font-size="9" font-family="HelveticaLTStd"><tspan y="9.83789" x=".00005">1</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 148.08042 133.18282)" font-size="9" font-family="HelveticaLTStd"><tspan y="9.83789" x=".00005 7.0020506 12.006051 17.010052 22.014054 25.011054 30.015053 32.51705 37.521055 40.023054 45.027055 50.031057 52.533056 54.531057 59.535058 62.037057 67.04105 70.038059 73.03506 78.039058 83.04305 85.54505 88.04705 91.04405 96.04805 101.05205 106.056049 111.06004 115.56004 118.06204 120.56404 125.56804 130.57204 133.07404 135.07204 140.07604 144.57604 149.07604 151.57804 156.58203 159.08403 161.58603 163.58403 168.58803 173.08803 177.58803">Generate an interrupt request on loss of lock.</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 56.249994 150.68283)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="33.048">6</tspan><tspan y="18.83789" x="24.543 30.546 35.55 40.554">PLLS</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 131.85 150.68283)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 6.0030004 11.007001 16.011002 18.513003 24.516003 29.520005 31.518006 36.522008 41.022008">PLL Select</tspan><tspan y="26.83789" x="0 6.4980008 11.502001 16.506 19.008002 22.005002 27.009003 29.007004 33.507005 36.009004 42.507005 47.511007 52.515008 55.017007 60.021009 65.02501 68.02201 70.52401 73.02601 78.03001 83.034008 85.536 91.539 96.543 101.547 104.048999 109.05299 112.049999 114.551998 120.050998 125.05499 130.05899 132.56099 137.56499 142.56899 145.07099 150.07498 155.07898 157.58098 160.08298 162.08098 166.58098 169.08298 173.58298 178.58698 180.58498 185.58898 190.08898 192.59098 197.59497 202.59897 205.10097 210.10497 214.60497 217.10697 219.60897 224.61296 229.61696 232.11896 239.61595 246.11396 253.11595 255.61795 260.11796 265.12196 270.12596 273.12297 277.62297 282.62696 285.12898 291.62696 296.63096 301.63496 306.63896 309.14097 315.63896 320.64295 326.64595 332.64894 335.15095 340.15495 342.65696 347.66096 350.16297 355.41899 360.42298 365.42698 367.929 370.431 372.933 375.43504 377.93705 380.43907 385.44306 390.44706 392.94908 398.95207 403.95606 408.96006">Controls whether the PLL or FLL output is selected as the MCG source when CLKS[1:0]=00. If the PLLS</tspan><tspan y="37.83789" x=".00004 5.0040409 7.002041 9.504042 12.0060429 14.004043 18.504044 21.006045 25.506045 27.504044 32.508047 37.512048 40.50905 45.51305 50.51705 53.01905 58.023054 63.027055 68.03105 70.53305 76.53605 81.54005 86.544048 93.042049 98.04604 104.04904 110.05204 116.55004 119.05204 124.05604 126.55804 128.55603 133.05603 135.55803 140.56203 145.56603 148.06803 150.57003 155.07003 160.07402 162.57602 165.07802 167.58002 170.08202 175.08602 180.09001 182.59201 188.59502 193.59902 198.60301 201.10501 203.10301 207.60301 210.10501 215.10901 217.10701 221.60701 226.61101 231.615 233.613 238.617 243.621 246.123 248.121 253.125 255.627 260.631 262.629 264.62699 267.129 274.626 279.63 284.634 289.638 294.138 296.64 299.14204 301.64405 304.14607 306.64808 309.1501 314.15409 319.15809 321.6601 327.6631 332.66709 337.67109 343.67408 346.1761 348.17408 352.67408 355.1761 359.6761 364.68009 367.1821 369.6841 372.18614 374.68815 379.69215 384.69615 387.19816 392.69715 397.70115 402.70515 405.20716 407.20515">bit is cleared and PLLCLKEN 0 is not set, the PLL is disabled in all modes. If the PLLS is set, the FLL is</tspan><tspan y="48.83789" x=".00008 5.004081 7.002081 11.502081 16.50608 21.510083 23.508084 28.512085 33.516088 36.018087 38.016088 43.02009 45.522089 50.52609 52.52409 54.52209 57.02409 64.52109 69.525089 74.52908 79.53308 84.03308">disabled in all modes.</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 131.85 212.68283)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x=".00008">0</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 148.08042 212.68283)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x=".00008 5.49908 10.50308 15.507081 18.00908 20.00708 24.50708 27.00908 31.50908 36.51308 38.51108 43.515085 48.015085 50.517084 55.521085 60.525087">FLL is selected.</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 131.85 223.68283)" font-size="9" font-family="HelveticaLTStd"><tspan y="9.83789" x=".00008">1</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 148.08042 223.68283)" font-size="9" font-family="HelveticaLTStd"><tspan y="15.23789" x=".00008 6.0030806 11.007081 16.011082 18.513083 20.511082 25.011082 27.513083 32.013086 37.017087 39.015089 44.01909 48.51909 51.021089 56.02509 61.02909 63.53109 66.52809 72.53109 79.02909 85.52709 88.02909 94.03209 96.53409 101.538089 104.040088 109.04408 114.04808 119.05208 124.056079 126.558078 129.06008 134.06407 136.56607 141.57007 146.57407 149.07607 154.08007 157.07706 162.08106 167.08506 170.08205 175.08605 182.58304 190.08003 195.08403 200.08803 202.59003 205.09203 210.09603 212.59803 215.10002 220.10402 225.10802 227.61002 232.11002 237.11402 240.11101 243.108 248.112 252.612 255.114 257.616 262.62 264.61799 269.11799 271.11598 276.11997 281.12397 284.12098 286.623 289.125 294.129 296.631 301.635 306.639 311.643 316.647 319.644 324.648 327.15003 332.15403 334.65605 339.66004 342.16206 348.16505 353.16905 358.17304 360.67506 363.67207 368.67607 371.17808 376.18208 379.17909 384.18309 389.18708 393.68708">PLL is selected (PRDIV 0 need to be programmed to the correct divider to generate a PLL reference</tspan><tspan y="26.23789" x=".000069999998 4.50007 6.4980704 11.502071 16.002072 20.502072 23.004073 25.002072 30.006073 32.50807 35.01007 40.014074 45.018075 47.520074 50.517076 55.521078 60.525079 65.529079 70.53307 73.03507 78.03907 80.54107 83.04307 88.047069 93.05106 98.05506 100.55706 108.05406 114.55206 119.05206 121.55406 126.55806 129.55506 131.55306 136.55706 139.55405 142.05605 144.55805 149.56204 152.06404 156.56404 161.56804 164.07004 166.57204 168.57004 173.57404 178.57804 181.08003 183.58203 188.58603 193.59003 196.09203 202.09503 207.09903 212.10303 218.10604 220.60803 225.61203 227.61003 230.11203 233.10903">clock in the range of 2–4 MHz prior to setting the PLLS bit).</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 56.249994 257.58283)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="33.048">5</tspan><tspan y="18.83789" x="23.049 29.547 37.044004 43.047006">CME0</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 131.85 257.58283)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 6.4980008 8.496 13.500001 18 22.5 25.002 32.499 37.503004 42.507005 44.505006 47.007005 52.011007 55.008008 57.510007 63.51301 68.517009 73.521 78.525 80.523">Clock Monitor Enable</tspan><tspan y="28.83789" x="0 6.0030004 11.007001 16.011002 21.015004 23.013005 28.017006 32.517007 35.019006 37.521005 42.525007 47.529008 50.031007 52.029008 57.03301 61.53301 66.033008 68.535 73.539 76.041 78.543 83.043 85.041 90.045 94.545 99.045 101.547 109.044 114.048 119.051998 121.049999 123.551998 128.556 131.553 133.551 138.555 143.55899 146.06099 150.56099 152.55899 155.55599 160.05599 165.05998 167.05799 169.55998 172.06198 174.56398 179.56798 182.56497 185.06697 187.56897 192.57297 197.57697 200.07897 207.08097 213.08397 219.58197 224.58597 227.08797 232.09197 236.59197 239.09397 244.09796 247.09496 252.09896 257.10298 259.10096 261.60298 264.59999 269.60398 272.106 277.11 280.107 285.111 290.115 294.615 299.619 302.121 309.618 314.622 319.122 321.62403 326.12403 331.12803 333.126 338.13 342.63 345.13203 347.63404 350.13606 355.63505 360.63905 365.64305 368.14506 373.14906 380.15107 386.64906 393.14704 399.15003 404.15403 406.65605 411.66004 413.65803">Enables the loss of clock monitoring circuit for the OSC0 external reference mux select. The LOCRE0 bit</tspan><tspan y="39.83789" x="0 6.4980008 8.496 10.494 12.492001 14.994001 19.998002 25.002003 27.504004 32.508005 35.505006 43.002008 45.000009 50.00401 55.00801 57.51001 59.50801 62.01001 64.51201 69.51601 72.018009 74.01601 79.020008 81.522 86.526 89.523 92.520008 97.524 102.528 105.03 107.532 112.535999 115.533 118.034999 123.038997 125.54099 128.538 133.54199 138.04199 143.04599 145.54799 148.04999 151.04698 156.05098 161.05498 166.05898 171.06298 175.56298 178.06497 180.56697 182.56497 187.06497 189.56697 194.57097 199.57497 204.57897 209.58296 212.57996 217.58396 220.08596 225.08995 230.09395 232.59595 235.09795 240.10195 242.09995 244.09795 249.10195 255.59995 257.59794 262.60194 267.60594 270.10795 275.11195 277.61396 279.61195 284.61595 289.11595 293.61595 296.11796 301.12196 303.62397 306.12599 313.128 319.13099 325.62898 330.63298 333.13499 335.13298 340.13697 345.14097 347.13896 351.63896 356.64295 359.14497 361.14295 366.14695 371.15095 373.65296 376.15498 381.65397 386.65797 391.66197 394.16398 400.66197 408.15898 414.16197">will determine if a interrupt or a reset request is generated following a loss of OSC0 indication. The CME0</tspan><tspan y="50.83789" x="0 5.0040009 7.002001 9.504002 12.006002 16.506003 21.510003 26.514004 31.518006 33.516008 38.520009 41.022008 46.02601 51.03001 53.02801 57.52801 60.03001 65.03401 70.03801 72.54001 77.04001 82.04401 84.546009 87.048007 89.55 94.554 97.056 102.06 104.562 106.56 111.563999 116.56799 118.565998 123.065998 125.56799 130.57199 133.07399 139.57199 144.57599 149.57999 154.58399 157.08599 159.58798 164.59198 169.59598 172.09798 179.59497 186.09297 193.09497 195.59697 197.59497 202.09497 204.59697 206.59497 211.59897 214.10097 219.10497 224.10897 226.61096 231.61496 236.61896 241.62296 244.61995 249.62395 252.12595 254.12395 259.12797 264.13197 269.13597 271.13395 273.63597 281.13298 286.13697 291.14097 296.14497 298.64698 301.149 306.15299 311.15699 313.659 316.161 321.165 325.665 330.669 335.169 337.67103 340.17304 345.17704 350.18104 352.68305 357.68705 362.18705 364.68907 369.69306 372.69007 377.69407 382.69807 384.69606 387.19807 391.69807 393.69606 398.70005 403.20005">bit should only be set to a logic 1 when the MCG is in an operational mode that uses the external clock</tspan><tspan y="61.83789" x=".00004 2.99704 8.49604 14.499041 20.50204 23.004042 25.506043 31.005043 37.00804 43.01104 45.51304 48.015039 54.018037 60.021036 66.02403 68.52603 71.02803 77.03103 83.03403 89.037029 91.539028 94.04102 99.04502 102.04202 104.54402 110.54702 115.55102 121.554019 127.557018 130.55402 133.05602 135.55802 138.06002 146.55602 151.56002 156.56401 161.56801 166.572 171.072 176.076 179.073 181.575 184.077 189.081 194.08499 196.58699 203.08499 210.58199 216.58499 221.58899 224.09099 229.09499 231.09299 233.59499 236.09699 238.09499 242.59499 245.09699 249.59699 254.60099 257.103 259.605 262.10704 267.11103 269.61305 274.61705 277.11906 279.11705 284.12104 289.12504 291.12303 295.62303 298.12504 303.12904 305.63105 308.13307 310.63508 315.63908 320.64308 323.14509 327.64509 332.64909 334.64707 339.65107 344.65507 347.15708 352.16108 354.6631 357.1651 359.6671 364.6711 369.6751 372.17713 378.6751 384.6781 391.1761 398.1781 404.1811">(FEE, FBE, PEE, PBE, or BLPE) . Whenever the CME0 bit is set to a logic 1, the value of the RANGE0</tspan><tspan y="72.83789" x=".00004 5.0040409 7.002041 9.504042 14.004042 16.506043 18.504044 23.508046 26.010046 28.512047 33.51605 38.52005 41.02205 47.52005 52.52405 55.02605 58.023054 63.027055 68.03105 70.02905 74.52905 77.03105 82.03505 85.03205 87.53405 92.03405 97.03805 102.042049 107.04604 109.044048 114.04804 116.55004 121.55404 126.55804 129.06005 131.56204 136.56604 141.57004 144.07204 148.57204 153.57604 158.58003 163.58403 168.58803 173.59203 178.59603 181.09803 183.60002 190.09803 197.59502 203.59803 208.60202 211.10402 216.10802 218.10602 220.60802 223.11002 227.61002 232.61402 237.61801 242.62201 244.62001 249.62401 252.126 257.13 262.134 264.63603 269.13603 274.14 276.64204 279.14405 281.64607 286.65007 289.15208 294.15608 296.65809 298.65608 303.66007 308.66407 310.66206 315.16206 317.66407 322.66807 325.17008 330.17408 335.17808 337.68009 342.68409 345.6811 350.6851 353.1871 355.68913 360.6931 365.6971 368.19914 375.69615 382.19413 389.19615 391.69816 396.70216 401.70616 404.20817 409.21217 412.20918">bits in the C2 register should not be changed. CME0 bit should be set to a logic 0 before the MCG enters</tspan><tspan y="83.83789" x=".00008 5.004081 10.008081 14.508081 17.010083 23.013083 25.515084 30.519085 35.523088 38.025087 45.522089 50.52609 55.53009 60.534093 63.03609 65.53809 72.54009 75.04209 80.04609 85.05009 88.04709 94.54509 96.54309 101.04309 106.04709 108.54909 111.05109 116.055088 118.55708 121.554088 126.55808 131.05808 136.06208 138.56407 141.06607 144.06307 149.06707 154.07106 159.07506 164.07906 168.57906 171.08106 173.58306 181.08005 186.08405 190.58405 193.08605 198.09004 202.59004 207.09004 212.09404 215.09104 217.59304 224.09104 229.09503 231.09304 233.09104 238.09503 240.59703 242.59503 247.59903 250.10103 256.10404 258.60606 263.61006 268.61405 271.11607 278.61308 283.61708 288.62107 293.62507 296.12709 298.6291 305.12709 312.62409 318.62709 323.63108 326.1331 330.6331 335.6371 340.64109 345.64509 347.64308 352.64707 355.14909 360.15309 362.15107 366.65107 371.65507 374.15708 379.16108 384.16508 386.66709 391.16709 396.17109 398.6731 401.1751 403.67713 408.68113 411.18315">any Stop mode. Otherwise, a reset request may occur while in Stop mode. CME0 should also be set to a</tspan><tspan y="94.83789" x=".00008 1.9980801 7.002081 12.006082 14.004082 18.504082 21.006083 26.010083 28.512084 33.516084 38.520086 41.022085 46.026086 49.023088 54.02709 56.529088 61.53309 66.53709 69.039089 74.04308 77.040088 79.038089 84.04208 89.04608 91.54808 97.55108 102.55508 108.558078 115.056079 117.558078 122.56207 125.559078 128.06108 134.06409 139.06809 145.07109 153.5671 156.06909 161.07309 166.07709 172.57509 177.57909 180.57608 183.07808 190.57508 195.57907 200.58307 205.58707 210.08707 212.58907 214.58707 217.08907 219.59107 222.09307 227.09706 232.10106 234.60306 242.10005 248.59806 255.60005 258.10206 260.10005 264.60005 267.10206 269.10005 274.10404 276.60606 282.60905 287.61305 293.61604 299.61903 302.12104 309.61805 314.62205 319.62605 324.63005">logic 0 before entering VLPR or VLPW power modes if the MCG is in BLPE mode.</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 131.85 365.58283)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x=".00007">0</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 148.08042 365.58283)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x=".00007 6.0030705 10.503071 13.005072 18.009072 21.006072 26.01007 31.014073 33.012075 35.514074 40.014074 42.012075 47.016077 51.516077 56.016077 58.518075 66.015079 71.01907 76.02307 78.02107 80.52307 85.52707 88.52407 91.02607 93.02407 97.52407 100.02607 105.03007 107.02807 111.52807 116.53207 121.536067 123.534069 128.53807 133.54207 136.04407 138.54607 143.55007 146.54706 149.04906 156.05106 162.05406 168.55207 173.55606">External clock monitor is disabled for OSC0.</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 131.85 376.58283)" font-size="9" font-family="HelveticaLTStd"><tspan y="9.83789" x=".00009">1</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 148.08042 376.58283)" font-size="9" font-family="HelveticaLTStd"><tspan y="9.83789" x=".00009 6.0030906 10.50309 13.005091 18.00909 21.00609 26.01009 31.014092 33.012094 35.51409 40.01409 42.012094 47.016096 51.516096 56.016096 58.518095 66.01509 71.01909 76.02309 78.02109 80.52309 85.527088 88.524089 91.026088 93.024089 97.524089 100.026088 105.03008 110.03408 115.03808 120.042079 122.04008 127.044078 132.04808 134.55008 137.05208 142.05608 145.05307 147.55507 154.55707 160.56008 167.05808 172.06208">External clock monitor is enabled for OSC0.</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 56.249994 394.08283)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="28.044 33.048 38.052003">4–0</tspan><tspan y="18.83789" x="22.545 28.548 35.046 37.548 43.551004">VDIV0</tspan></text>
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<g clip-path="url(#clip_10)">
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</g>
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<text xml:space="preserve" transform="matrix(1 0 0 1 131.85 394.08283)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 6.0030004 12.501001 19.503003 22.005003 27.009003 29.511004 36.009004 38.007005 42.507005 44.505006 49.509008 54.51301">VCO 0 Divider</tspan><tspan y="37.83789" x="0 6.0030004 11.007001 13.005001 18.009003 22.509003 25.011004 29.511004 32.013006 34.515005 39.519006 44.523008 47.025007 52.029008 59.52601 64.53001 69.534008 74.538 77.04 79.542 82.044 87.048 89.549999 94.55399 96.551998 101.051998 103.049999 108.05399 113.05799 115.55999 118.06199 123.06599 128.06999 130.57199 136.575 143.073 150.075 152.577 157.581 162.58499 165.08699 170.09099 175.09499 177.59699 180.09899 185.10298 187.60498 190.10698 192.60898 197.61298 202.61698 205.11898 211.12198 216.12598 221.12998 223.63198 226.13397 231.63297 236.63697 241.64096 244.14296 250.14597 256.64396 259.14598 265.14897 267.65098 272.65498 275.15699 280.16099 282.15898 284.66099 289.16099 291.663 296.667 301.167 303.669 308.673 313.677 315.675 317.67298 322.17298 327.17698 329.679 332.181 337.185 342.189 344.691 352.18803 357.19203 359.19 361.69203 363.69 368.694 370.692 372.68998 377.18998 382.19398 384.69599 386.69398 391.69798 396.70198 399.20399 401.706 406.71 411.21 413.712 418.716">Selects the amount to divide the VCO output of the PLL. The VDIV 0 bits establish the multiplication factor</tspan><tspan y="48.83789" x=".00003 2.99703 10.494031 13.491031 15.993031 20.997033 26.001034 31.005036 33.003038 35.001039 40.00504 45.00904 47.51104 50.01304 55.01704 57.51904 60.021039 65.02504 70.02904 72.53104 75.52804 80.532039 83.034038 88.03803 91.035037 96.03903 101.04303 105.54303 110.54703 113.04903 117.54903 119.54703 124.551029 129.05103 133.55103 136.05303 138.55503 141.55202 146.55602 151.56002 156.56401 161.56801 166.572 171.072 175.572 178.074 180.576 186.57901 189.08101 191.58301 196.587 199.584 202.086 204.588 209.592 214.596 217.09799 223.101 228.105 233.109 235.611 237.609 242.109 244.611 249.61499 254.61899 259.623 264.62699 266.62498 271.62898 276.63298 279.13499 282.132 287.136 291.636 294.138 298.638 303.642 306.144 308.64604 310.644 315.648 320.652 323.15403 328.15803 330.156 332.65803 337.66203 342.66603 345.66304 348.16505 354.16804 359.17204 364.17604 370.674 375.678 381.681 387.684 394.18199 396.684 401.688 404.19 409.194">(M) applied to the reference clock frequency. After the PLL is enabled (by setting either PLLCLKEN 0 or</tspan><tspan y="59.83789" x=".00003 6.0030305 11.0070309 16.011033 22.014033 25.011033 27.513033 30.015034 32.517034 37.521036 42.525037 45.027036 51.030038 57.528039 60.030038 66.033039 68.535037 73.53903 76.04103 80.54103 85.54503 87.54303 92.54703 97.551029 100.053028 107.550029 112.55402 117.05402 119.55602 122.05802 127.06202 132.06603 134.56803 137.07003 142.07402 147.07802 149.58002 154.08002 159.08402 164.08802 169.09201 174.09601 179.1 184.104 186.606 193.104 198.108 203.112 208.116 210.618 215.622 222.624 229.122 235.125 237.627 242.631 245.133 247.131 251.631 254.133 258.633 263.637 266.634 271.638">PLLS), the VDIV 0 value must not be changed when LOCK 0 is zero.</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 232.30004 467.08283)" font-size="12" font-family="HelveticaLTStd" font-weight="bold"><tspan y="10.11719" x="13.96806 21.30006 27.972062 35.30406 38.64006 45.31206 48.648065 55.320066 61.992067 65.98807 72.660068 84.99606 93.00006 100.33206 107.66406 111.00006 119.00406 127.66806 137.00406 140.34006 149.00406 152.34006 159.01206 162.34806 169.68006 176.35205 179.68805 187.02005 193.69205 200.36405 204.36005 211.69205">Table 25-9.PLL VCO Divide Factor</tspan></text>
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<g clip-path="url(#clip_11)">
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<text xml:space="preserve" transform="matrix(1 0 0 1 134.1 488.58283)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 6.0030004 12.501001 15.003002 21.006003 23.508004">VDIV 0</tspan></text>
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<g clip-path="url(#clip_12)">
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<path transform="matrix(1,0,0,1,131.85,486.33283)" d="M38.78637 .25H76.82274V26.25H38.78637Z" fill="#ffffff" fill-rule="evenodd"/>
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<text xml:space="preserve" transform="matrix(1 0 0 1 172.63639 488.58283)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 7.4970009 12.501001 14.4990019 17.001002 18.999 24.003003 26.001004">Multiply</tspan><tspan y="18.83789" x="0 5.499 10.503 15.003 17.505002 22.509003">Factor</tspan></text>
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<g clip-path="url(#clip_13)">
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<path transform="matrix(1,0,0,1,131.85,486.33283)" d="M77.32273 .25H115.3591V26.25H77.32273Z" fill="#ffffff" fill-rule="evenodd"/>
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</g>
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<g clip-path="url(#clip_14)">
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<path transform="matrix(1,0,0,1,131.85,486.33283)" d="M115.8591 .25H153.89546V26.25H115.8591Z" fill="#ffffff" fill-rule="evenodd"/>
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</g>
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<text xml:space="preserve" transform="matrix(1 0 0 1 249.7091 488.58283)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 6.0030004 12.501001 15.003002 21.006003 23.508004">VDIV 0</tspan></text>
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<g clip-path="url(#clip_15)">
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<path transform="matrix(1,0,0,1,131.85,486.33283)" d="M154.39546 .25H192.43183V26.25H154.39546Z" fill="#ffffff" fill-rule="evenodd"/>
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</g>
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<text xml:space="preserve" transform="matrix(1 0 0 1 288.24549 488.58283)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 7.4970009 12.501001 14.4990019 17.001002 18.999 24.003003 26.001004">Multiply</tspan><tspan y="18.83789" x="0 5.499 10.503 15.003 17.505002 22.509003">Factor</tspan></text>
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<g clip-path="url(#clip_16)">
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<path transform="matrix(1,0,0,1,131.85002,486.33283)" d="M192.93183 .25H230.96819V26.25H192.93183Z" fill="#ffffff" fill-rule="evenodd"/>
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</g>
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<g clip-path="url(#clip_17)">
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<path transform="matrix(1,0,0,1,131.85004,486.33283)" d="M231.46819 .25H269.50456V26.25H231.46819Z" fill="#ffffff" fill-rule="evenodd"/>
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<text xml:space="preserve" transform="matrix(1 0 0 1 365.31825 488.58283)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 6.0030004 12.501001 15.003002 21.006003 23.508004">VDIV 0</tspan></text>
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<g clip-path="url(#clip_18)">
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<path transform="matrix(1,0,0,1,131.85005,486.33283)" d="M270.00456 .25H308.04093V26.25H270.00456Z" fill="#ffffff" fill-rule="evenodd"/>
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</g>
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<text xml:space="preserve" transform="matrix(1 0 0 1 403.8546 488.58283)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 7.4970009 12.501001 14.4990019 17.001002 18.999 24.003003 26.001004">Multiply</tspan><tspan y="18.83789" x="0 5.499 10.503 15.003 17.505002 22.509003">Factor</tspan></text>
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<g clip-path="url(#clip_19)">
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<path transform="matrix(1,0,0,1,131.85007,486.33283)" d="M308.54093 .25H346.5773V26.25H308.54093Z" fill="#ffffff" fill-rule="evenodd"/>
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</g>
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<g clip-path="url(#clip_20)">
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<path transform="matrix(1,0,0,1,131.85007,486.33283)" d="M347.0773 .25H385.11369V26.25H347.0773Z" fill="#ffffff" fill-rule="evenodd"/>
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</g>
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<text xml:space="preserve" transform="matrix(1 0 0 1 480.92738 488.58283)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 6.0030004 12.501001 15.003002 21.006003 23.508004">VDIV 0</tspan></text>
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<g clip-path="url(#clip_21)">
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<path transform="matrix(1,0,0,1,131.85007,486.33283)" d="M385.61369 .25H423.65007V26.25H385.61369Z" fill="#ffffff" fill-rule="evenodd"/>
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</g>
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<text xml:space="preserve" transform="matrix(1 0 0 1 519.46377 488.58283)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 7.4970009 12.501001 14.4990019 17.001002 18.999 24.003003 26.001004">Multiply</tspan><tspan y="18.83789" x="0 5.499 10.503 15.003 17.505002 22.509003">Factor</tspan></text>
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<g clip-path="url(#clip_22)">
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<path transform="matrix(1,0,0,1,131.85007,512.8328)" d="M.25 .25H38.28637V15.25H.25Z" fill="#ffffff" fill-rule="evenodd"/>
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</g>
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<text xml:space="preserve" transform="matrix(1 0 0 1 134.10007 515.0828)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 5.0040009 10.008001 15.012002 20.016003">00000</tspan></text>
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<g clip-path="url(#clip_23)">
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<path transform="matrix(1,0,0,1,131.85007,512.8328)" d="M38.78637 .25H76.82274V15.25H38.78637Z" fill="#ffffff" fill-rule="evenodd"/>
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<text xml:space="preserve" transform="matrix(1 0 0 1 172.63645 515.0828)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 5.0040009">24</tspan></text>
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<g clip-path="url(#clip_24)">
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<path transform="matrix(1,0,0,1,131.85007,512.8328)" d="M77.32273 .25H115.3591V15.25H77.32273Z" fill="#ffffff" fill-rule="evenodd"/>
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