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birdcage/docs/K60-refman-vectors/K60-reference-manual_page_347.svg
Ryan Malloy 5252d1d73c Add hardware reference docs (A3981, K60, RYS352A) 
Allegro A3981 stepper motor driver: datasheet, KiCad symbols/footprint,
3D model (TSSOP-28). Two per G2 board, SPI-controlled, AUTO microstep.

NXP MK60DN512VLQ10 (Kinetis K60): datasheet and 1300-page reference
manual. Cortex-M4 96MHz MCU running the G2 firmware.

Reyax RYS352A GPS module: datasheet and PAIR command guide.
GPS receiver on the G2 board (used for auto-location/satellite lookup).

All extracted as markdown + page images + vector SVGs for LLM context.
Binary assets (PDFs, PNGs, SVGs, STEP, WRL) stored via git-lfs.
2026-02-14 18:36:42 -07:00

128 lines
33 KiB (Stored with Git LFS)
XML
Raw Blame History

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<text xml:space="preserve" transform="matrix(1 0 0 1 54 54)" font-size="14" font-family="TimesLTStd"><tspan y="11.85" x="0 4.662 11.662001 15.162001 25.27 33.824 42.378004 50.162004 53.662004 57.162004 61.054006 68.054 74.270008 77.770008 84.770008 91.770008 96.43201 102.64801 109.64801 113.54001 120.54001 124.04001 131.04001 138.04001 141.932 145.824 152.04001 159.04001 165.25601 168.75601 173.41802 179.63402 186.63402 193.63402 197.52602 203.74202 207.63402 214.63402 219.29602 222.79602 226.68802 232.13402 235.63402 239.52602 246.52602 250.02602 253.91802 257.81004 263.25605 266.75605 272.20207 276.09407 283.09407 290.09407 294.75605 299.41804 305.63404 312.63404 319.63404 323.52604 329.74205 333.63404 337.52604 344.52604 351.52604 355.02604 360.47206 364.36405 370.58006 374.47206 380.68806 384.18806 394.29606 401.29606 405.18806 409.08006 415.29606 418.79606 429.68806 436.68806 442.13407 446.02607 449.52607 456.52607 460.41807 467.41807 471.31007 475.20207 481.41807">In VLLS, the on-chip voltage regulator is in its stop-regulation state while most digital</tspan><tspan y="27.85" x="0 3.8920005 10.892 17.892 21.784 28 31.5 35.392004 40.838 44.338 51.338 58.338 68.446 74.662 79.324008 85.54001 92.54001 96.04001 103.04001 107.70201 112.36401">logic is powered off.</tspan><tspan y="52.25" x="0 9.338001 15.554002 20.216002 27.216002 31.878003 38.094 41.594 47.81 54.81 58.702005 64.91801 69.58001 73.47201 80.47201 87.47201 90.97201 101.08001 109.63401 118.18801 125.972019 129.47202 140.36402 147.36402 154.36402 160.58002 164.08002 167.58002 171.47202 178.47202 184.68802 188.18802 195.18802 200.63402 206.85002 211.51203 215.01203 220.45803 227.45803 234.45803 241.45803 245.35002 252.35002 255.85002 262.066 269.066 276.066 280.728 284.62 291.62 298.62 303.28199 309.498 312.998 316.88999 323.88999 330.106 333.606 337.498 344.498 354.606 359.26799 363.15998 369.37599 375.59199 382.59199 388.80799 395.80799 402.024 405.524 415.632 421.848 428.848 435.064 442.064 449.064 452.564 457.22599 465.77998 474.33396 487.54997 497.65797">Before entering VLLS mode, the user should configure the low-leakage wakeup (LLWU)</tspan><tspan y="68.25" x="0 10.892001 17.892003 24.892003 31.892003 35.784006 42.000005 45.500005 49.392007 56.392007 59.892007 66.10801 73.10801 79.32401 86.32401 90.21601 96.432018 99.932018 103.82401 110.82401 117.040019 120.540019 127.540019 133.75601 139.20201 143.09401 147.75601 153.97202 160.97202 164.47202 174.58002 180.79602 187.79602 194.01203 201.01203 208.01203 211.51203 216.95803 223.95803 230.95803 235.62003 241.83603 248.05204 253.49803 256.99806 260.49806 269.05204 276.05204 282.26805 285.76805 291.98405 298.98405 305.20005 309.09205 312.98405 319.20005 326.20005 330.09205 336.30805 339.80805 349.91606 356.13206 363.13206 369.34806 376.34806 383.34806 386.84806 392.29408 399.29408 406.29408 410.95606 417.17207 423.38807 428.83409 432.33409 436.22608 443.22608 446.72608 456.83409 465.38807 473.94206 481.72605 485.22605 491.44206 496.10404">module to enable the desired wakeup sources. The available wakeup sources in VLLS are</tspan><tspan y="84.25" x="0 7 13.216001 17.108002 23.324002 27.216002 31.108002 37.324 44.324 47.824 51.716005 58.716005 62.216005 66.108 73.108 79.324008 82.824008 89.04001 96.04001 99.93201 106.93201 110.43201 116.64801 123.64801 130.64801 135.31002 139.20201 146.20201 153.20201 157.86402 164.08002 167.97202 171.86402 178.86402 185.86402 189.36402 196.36402 202.58002 206.47202 212.68802 216.58002 220.47202 225.91802 229.41802 234.08002 241.08002 245.74202 249.24202 253.13402 260.13404 264.02604 269.47206 272.97206 279.97206 286.18806 293.18806 297.08006 303.29606 309.51206">detailed in the chip configuration details for this device.</tspan><tspan y="108.65" x="0 10.108001 14.77 18.662 24.878003 29.540003 33.04 43.148004 49.364004 56.364004 62.58 69.58 76.58 80.08 84.742008 89.40401 96.40401 107.296009 110.796009 120.90401 129.45801 138.01201 145.796 149.296 152.796 156.688 163.688 169.904 173.404 180.404 186.62001 193.62001 197.51201 203.72801 209.94402 213.44402 218.10602 224.32202 228.21402 235.21402 239.87602 246.87602 252.32202 255.82202 259.71403 266.71403 270.21403 277.21403 284.21403 288.876 299.768 305.984 309.876 313.376 322.71403 332.82203 342.93003 346.43003 357.32203 364.32203 371.32203 377.53804 381.03804 391.14604 395.03804 398.93003 405.93003 409.43003 415.64604 419.14604 426.14604 432.36204 439.36204 446.36204 450.25404 457.25404">After wakeup from VLLS, the device returns to normal RUN mode with a pending</tspan><tspan y="124.65" x="0 8.554 17.108 30.324002 40.432004 43.932004 47.824007 54.824007 58.716009 64.93201 69.59401 74.25601 81.25601 88.25601 92.14801 95.64801 99.14801 103.81001 110.81001 114.31001 118.20201 125.20201 131.41802 134.91802 143.47202 152.02602 165.24202 175.35002 178.85002 182.74202 189.74202 193.63402 199.85002 204.51203 209.17403 216.17403 223.17403 227.06603 230.56603 236.01203 242.22803 246.89003 253.89003 257.78205 263.99806 270.21406 273.71406 278.37605 285.37605 292.37605 296.26805 300.16004 307.16004 313.37605 316.87605 321.53804 326.2 333.984 343.32203 347.984 351.484 354.984 358.876 365.876 372.092 375.592 382.592 388.03804 394.25404 398.91603 402.41603 408.63203 414.84803 421.84803 425.34803 432.34803 439.34803 443.24003 447.13203 450.63203 454.52403 461.52403">LLWU interrupt. In the LLWU interrupt service routine (ISR), the user can poll the</tspan><tspan y="140.65001" x="0 8.554 17.108 30.324002 40.432004 43.932004 54.824007 61.824007 68.824008 75.824008 79.716 85.93201 89.43201 99.54001 105.75601 112.75601 118.972019 125.972019 132.97202 136.47202 141.13402 145.02602 151.24202 158.24202 163.68802 167.18802 171.08002 178.08002 181.58002 188.58002 194.79602 198.68802 204.90402 209.56603 220.45803 224.35002 231.35002 237.56603 241.06603 244.95803 251.95803 258.174 261.674 267.12004 274.12004 281.12004 285.782 291.99803 298.21403 301.71403 308.71403 313.376 316.876 320.768 327.768 333.984 337.484 347.592 353.808 360.808 367.02403 374.02403 381.02403">LLWU module wakeup flags to determine the source of the wakeup.</tspan><tspan y="165.05" x="0 13.216001 20.216 26.432 33.432 36.932 43.148 50.148 54.04 60.256 64.918 68.81 75.81 82.81 86.31 96.418 104.972 113.526 121.310009 124.810009 128.31 134.526 140.742 146.95801 153.95801 157.45801 162.12001 166.01201 176.12001 179.62001 186.62001 190.51201 197.51201 201.01201 204.904 210.35 213.85 217.742 223.95801 227.85 234.06601 241.06601 247.28202 254.28202 257.782 263.99803 269.44404 272.94404 279.16004 286.16004 293.16004 297.82203 301.71403 308.71403 315.71403 320.376 326.592 333.592 337.092 344.092 350.308 354.97 361.97 366.632 372.848 376.348 382.564 389.564 395.78 401.996 408.996 412.888 416.78 423.78 430.78 434.28 444.388 452.942 461.49598 469.27998">When entering VLLS, each I/O pin is latched as configured before executing VLLS.</tspan><tspan y="181.05" x="0 9.338001 15.554002 21.770003 27.986004 34.986005 40.432004 46.648004 50.148004 56.364004 60.256006 64.148 67.648 74.648 78.54 85.54 89.432 93.324 99.54 103.432 106.932 110.824 117.824 124.824 128.716 134.932 138.432 142.324 149.324 152.824 156.716 163.716 169.932 173.432 185.878 195.216 205.324 208.824 212.716 218.162 221.662 228.662 235.662 245.77 251.98601 256.648 262.864 269.864 273.364 280.364 285.026 289.688 293.188 296.688 302.904 306.796 310.688 314.188 321.188 328.188 332.84999 336.74198 340.24198 346.45799 353.45799 360.45799 363.95799 370.95799 377.17399 381.83598 385.72798 392.72798 399.72798 405.94398 410.60597 416.82197 420.71397 424.21397 431.21397 437.42997 441.32197 447.53797 451.03797 454.92997 460.37599 463.87599 467.76799 474.76799 480.214">Because all digital logic in the MCU is powered off, all port and peripheral data is lost</tspan><tspan y="197.05" x="0 7 14 18.662 22.554 29.554 36.554 40.054 50.162004 58.716005 67.270008 75.05401 78.55401 82.05401 90.60801 97.60801 101.50001 106.94601 110.44601 114.338008 121.338008 126.00001 133 137.662 148.554 154.77 158.662 162.554 169.554 176.554 180.054 190.946 197.946 203.392 207.284 210.784 217.784 224 227.5 232.162 238.378 243.824 247.716 254.716 259.378 265.594 272.594 276.094 283.094 289.31 293.972 300.972 305.63398 311.84999 315.34999 319.24198 326.24198 332.45799 335.95799 346.06599 355.404 365.512 370.17399 377.95799 388.06599 391.56599 398.56599 402.45799 406.34999 409.84999 413.74198 420.74198 424.24198 428.13398 435.13398 441.34999 444.84999 452.63398 465.08 474.418 477.918 481.81">during VLLS. This information must be restored before the ACKISO bit in the PMC is</tspan><tspan y="213.05" x="0 5.4460008 11.662001 15.554001">set.</tspan><tspan y="237.45" x="0 10.108001 17.108002 20.608002 26.824002 32.27 37.716 43.932 48.593999 52.486 58.702 65.701999">An asserted </tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 54 54)" font-size="14" font-family="TimesLTStd"><tspan y="237.45" x="69.202 78.54001 87.09401 94.87801 103.432018 111.986019 115.486019 122.486019 126.37801 133.37802 136.87802 146.98603 150.87802 154.77002 158.66202 162.16202 168.37802 174.59403 181.59403 187.04003 193.25603 196.75603 202.97203 209.97203 213.47203 219.68804 226.68804 230.58003 234.47203 237.97203 242.63404 247.29604 254.29604 265.18806 268.68806 274.90406 281.90406 288.90406 292.40406 302.51206 311.06605 319.62004 327.40403 330.90403 341.79603 348.79603 355.79603 362.01203 365.51203 369.01203 373.674 379.89 383.782 390.782 395.444 402.444 406.336 413.336 420.336 423.836 427.728 434.728 440.944 444.444 451.444 457.66 464.66 468.552 474.768 480.984 484.484 488.376">RESET pin will cause an exit from any VLLS mode, returning the device to</tspan><tspan y="253.45" x="0 7 14 18.662 29.554 35.77 39.662004 43.162004 52.500005 62.608007 72.716 76.216 87.108 94.108 101.108 107.324008 110.824008 114.324008 127.54001 134.54001 140.75601 147.75601 151.25601 157.47202 164.47202 168.36402 172.25601 176.14801 183.14801 190.14801 193.64801 203.75601 212.31002 220.86402 228.64801 232.14801 239.14801 243.04001 249.25601 252.75601 256.648 263.648 269.864">normal RUN mode. When exiting VLLS via the </tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 54 54)" font-size="14" font-family="TimesLTStd"><tspan y="253.45" x="273.364 282.70204 291.256 299.04 307.594 316.14799 319.64799 326.64799 330.53999 337.53999 341.03999 344.53999 348.43199 355.43199 361.64799 365.14799 372.93199 377.59397 387.70198 391.20198 397.41798 404.41798 411.41798 414.91798 428.13398 438.24198 448.34999 456.90397 467.01197 474.79597 478.29597 485.29597 489.18797 493.07997">RESET pin, the PIN and WAKEUP bits</tspan><tspan y="269.44999" x="0 6.2160007 10.878 17.094002 20.594002 26.040003 32.256006 36.148008 39.648008 43.54001 50.54001 54.04001 57.93201 64.93201 71.14801 74.64801 82.432018 91.77002 99.55402 106.55402 110.05402 114.71603 120.93203 127.93203 131.82404 137.27004 141.16204 147.37804 152.04004 155.54004 162.54004 167.20204 170.70204 174.59404 181.59404 187.81005 191.31005 195.97205 202.18805 207.63405 213.85005 217.74205 221.24205 227.45806 234.45806 241.45806 245.35005 250.01206 257.01206 260.90406 264.40406 275.29606 282.29606 289.29606 296.29606 300.18806 306.40406 309.90406 314.56605 323.90406 333.24208 345.68809 350.35008">are set in the SRS0 register of the reset control module (RCM).</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 364.99998)" font-size="16" font-family="HelveticaLTStd" font-weight="bold"><tspan y="12.65625" x="-.006 8.890001 17.786004 22.234004 31.130005 35.578008">14.4.6</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 112.65332 364.99998)" font-size="16" font-family="HelveticaLTStd" font-weight="bold"><tspan y="12.65625" x="-.006 11.546001 20.442002 30.218003 39.994005 49.770006 54.218008 58.666009 68.44201 72.89001 77.338008 87.114009 99.562007 104.01 113.786 123.562007 136.01001 144.906 151.13 155.578 169.802 179.578 189.354 198.25">Debug in low power modes</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 54)" font-size="14" font-family="TimesLTStd"><tspan y="348.24998" x=".002 13.218 20.218 26.434002 33.434003 36.934003 40.826005 47.826005 54.042005 57.542005 69.98801 79.326007 89.434009 92.934009 96.826007 102.272 105.772 111.218 117.434009 123.65001 130.65001 135.31201 141.52802 145.02802 148.52802 152.42002 159.42002 165.63602 169.13602 176.13602 182.35202 189.35202 193.24402 199.46002 205.67603 209.17603 216.17603 220.06803 225.51403 231.73003 238.73003 242.62203 248.83803 254.28403 258.17604 262.06803 265.96003 276.85203 280.74403 284.63603 290.08204 293.58204 300.58204 306.79804 313.79804 320.79804 327.79804 334.79804 341.01405 345.67604 349.17604 356.17604 363.17604 369.39204 374.05403 380.27003 384.16203 388.05403 395.05403 402.05403 405.55403 409.05403 422.27003 429.27003 435.48603 442.48603 445.98603 449.87803 456.87803 463.09403 466.59403 479.04005 488.37806">When the MCU is secure, the device disables/limits debugger operation. When the MCU</tspan><tspan y="364.24998" x=".00203 3.8940304 9.340031 12.840031 19.84003 26.84003 32.28603 38.50203 44.71803 51.71803 56.380029 62.596029 66.09602 69.59602 73.48802 80.48802 86.704029 90.204029 100.31203 109.650028 122.09602 125.59602 132.59603 138.81203 145.81203 152.81203 159.81203 166.81203 173.02803 177.69004 181.19004 187.40604 193.62204 200.62204 204.12204 210.33805 215.78404 221.23004 227.44605 232.10805 236.00005 239.50005 243.39205 253.50005 260.50007 264.00007 271.00007 278.00007 288.10807 294.32408 298.98606 303.64805 310.64805 317.64805 321.14805 325.81004 332.02604 339.02604 346.02604 352.24205 357.68806 361.58006 365.08006 370.52607 374.41807 381.41807 388.41807 394.63407 398.52607 403.97209">is unsecure, the ARM debugger can assert two power-up request signals:</tspan><tspan y="388.64997" x="13.10602 23.99802 31.78202 38.78202 44.22802 48.12002 54.33602 65.22802 68.72802 75.72802 82.72802 92.83602 99.052028 103.71403 107.21403 114.21403 121.21403 124.71403 128.21402 135.21402 139.10602 145.32202 148.82202 156.60602 166.71402 174.49802 182.28202 195.49802 204.83602 208.33602 212.22801 219.22801 222.72801 226.62001 233.62001 239.83602 243.33602 253.44402 259.66 266.66 273.66 280.66 284.16 291.944 298.944 303.606 307.498 310.998 320.336 327.336 334.336 338.228 342.88999 349.88999 353.78199 357.67399 365.45799 369.34999 375.56599 379.45799 382.95799 387.61997 393.83598 400.83598 404.72798 410.17399 414.06599 420.28199">&#x2022;System power up, via SYSPWR in the Debug Port Control/Stat register</tspan><tspan y="404.64997" x="13.10605 23.99805 34.106054 40.322053 47.322053 54.322053 61.322053 64.82205 71.82205 78.82205 88.93005 95.14606 99.80806 103.30806 110.30806 117.30806 120.80806 124.30806 131.30806 135.20006 141.41606 144.91606 154.25406 164.36206 173.70006 183.80806 191.59206 204.80806 214.14606 224.25406 232.03806 241.37606 249.93006 260.03807 263.53807 267.43006 274.43006 277.93006 281.82206 288.82206 295.03807 298.53807 308.64607 314.86207 321.86207 328.86207 335.86207 339.36207 347.14607 354.14607 358.80805 362.70005 366.20005 375.53807 382.53807 389.53807 393.43006 398.09205 405.09205 408.98405 412.87605 420.66004 424.55204 430.76805 434.66004 438.16004 442.82203 449.03804 456.03804 459.93003 465.37605 469.26805 475.48405">&#x2022;Debug power up, via CDBGPWRUPREQ in the Debug Port Control/Stat register</tspan><tspan y="430.64997" x=".0020799638 13.2180809 20.21808 26.434082 33.434083 36.934083 43.15008 48.59608 54.04208 60.25808 64.92008 68.81208 75.02808 82.02808 85.52808 95.636089 102.636089 106.52808 110.42008 116.636089 120.136089 124.02808 131.02808 134.52808 143.86608 153.97408 164.08208 167.58208 171.08208 184.29808 194.40608 199.06809 207.62209 211.12209 214.62209 224.73009 233.28409 241.06809 250.40608 253.90608 257.40608 264.40608 269.06806 272.56806 282.67607 291.23005 299.01405 312.23005 315.73005 319.23005 323.12205 330.12205 336.33805 339.83805 350.73005 357.73005 364.73005 370.94606 374.44606 380.66206 387.66206 394.66206 398.55406 403.21604 410.21604 414.10804 418.00004 424.21604 428.87803 432.37803 439.37803 444.04 447.932 454.932 461.148 466.59403 470.09403">When asserted while in RUN, WAIT, VLPR, or VLPW, the mode controller drives a</tspan><tspan y="446.64997" x=".0020799638 6.2180807 13.2180809 17.880082 22.542082 28.758084 34.204084 41.204084 48.204084 55.204084 62.204084 66.096088 73.096088 80.096088 83.596088 89.81209 96.02809 103.02809 110.02809 117.02809 127.13609 131.02809 137.2441 144.2441 151.2441 157.4601 160.9601 165.6221 172.6221 177.2841 180.7841 187.0001 193.21611 199.43212 206.43212 209.93212 215.37812 219.27011 226.27011 233.27011 239.48612 243.37812 246.87812 250.37812 254.27011 261.2701 267.4861 271.3781 274.8781 278.7701 284.21614 287.71614 291.21614 298.21614 305.21614 309.10813 316.10813 319.60813 328.94615 339.05415 348.39216 358.50016 366.28416 379.50016 388.83818 398.94618 406.73017 416.83818 426.17619 436.28419 439.78419 446.00019 453.00019">corresponding acknowledge for each signal, that is, both CDBGPWRUPACK and</tspan><tspan y="462.64997" x=".0020799638 9.340081 17.124083 27.232083 35.016084 42.800085 56.016084 65.35408 75.46208 83.246089 93.35409 102.69209 112.800098 116.300098 119.800098 133.0161 140.0161 146.2321 153.2321 156.7321 163.7321 170.7321 174.6241 181.6241 185.1241 189.7861 196.0021 203.0021 210.0021 216.21811 221.66411 225.5561 231.0021 234.5021 240.71811 245.38011 251.59612 255.09612 261.3121 266.75813 272.20414 278.42015 283.08213 286.97413 293.19013 300.19013 303.69013 307.19013 311.08213 318.08213 324.29814 327.79814 338.69013 345.69013 352.69013 358.90614 362.40614 368.62214 375.62214 382.62214 386.51414 391.17613 398.17613 402.0681 405.9601 412.17613 416.8381 420.3381 427.3381 433.5541 440.5541 447.5541 451.4461 457.6621">CSYSPWRUPACK. When both requests are asserted, the mode controller handles</tspan><tspan y="478.64997" x=".0020799638 6.2180807 10.110081 14.002081 20.218083 31.110085 38.110086 42.002088 47.448087 50.948087 54.840089 61.840089 65.34009 71.55609 78.55609 82.44809 88.66409 93.326099 96.826099 104.6101 113.1641 123.2721 131.0561 134.5561 140.77211 147.77211 154.77211 158.27211 168.38011 176.93412 184.71811 192.5021 196.0021 203.0021 210.0021 213.5021 219.71811 226.71811 230.6101 236.82611 241.48812 245.38011 252.38011 259.38014 262.88014 269.09614 276.09614 279.59614 285.81214 296.70414 303.70414 307.59614 313.81214 317.70414 323.92015 330.92015 334.42015 339.86616 343.75816 350.75816 357.75816 361.25816 366.70417 370.59617 376.81217 380.70417 386.92018 390.42018 393.92018 398.58216 405.58216 409.08216 412.97416 419.97416 423.86616 429.31217 432.81217 439.02818 449.92018 456.92018 460.81217 467.02818 470.92018 477.13618">attempts to enter STOP and VLPS by entering an emulated stop state. In this emulated</tspan><tspan y="494.64997" x=".0020799638 5.4480807 9.340081 16.34008 23.34008 26.84008 32.28608 36.17808 42.39408 46.286085 52.502084">stop state:</tspan><tspan y="519.0499" x="13.10608 23.998082 27.890082 34.890085 41.106084 44.606084 49.26808 55.48408 62.48408 69.484088 73.37608 79.59209 83.484088 90.484088 95.14609 98.64609 102.538089 107.984088 111.484088 115.37608 122.37608 125.87608 130.53809 137.53809 144.53809 148.03809 152.70009 158.91609 165.91609 172.91609 176.80809 183.0241 186.91609 190.80809 197.80809 204.80809">&#x2022;the regulator is in run regulation,</tspan><tspan y="535.0499" x="13.10608 23.998082 27.890082 34.890085 41.106084 44.606084 57.052087 66.39009 76.49809 81.160099 88.160099 94.3761 101.3761 107.5921 112.254108 118.47011 122.36211 128.57811 135.57811 139.07811 145.29412 149.18611 156.18611 162.40212 169.40212 172.90212 178.34812 185.34812 192.34812 197.01012 203.22612 209.44213 212.94213 216.83412 222.28012 225.78012 231.99613 238.99613 245.21213 252.21213 256.10414 262.32014 269.32014">&#x2022;the MCG-generated clock source is enabled,</tspan><tspan y="551.0499" x="13.10611 23.998112 30.214112 34.106115 37.998117 41.498117 46.944116 53.944116 59.390115 63.282117 69.498119 80.390117 83.890117 90.10612 93.998119 100.998119 107.21412 114.21412 119.66012 123.16012 126.66012 132.87612 139.87612 146.09212 152.30812 159.30812 163.20012 166.70012 170.59212 177.59212 183.80812 187.30812 193.52413 200.52413 205.18613 211.40213 214.90213 221.11814 225.01013 232.01013 238.22614 245.22614 248.72614 252.22614 258.44215 263.10414 269.32014 272.82014 279.82014 283.71214 289.15815 295.37416 302.37416 306.26615 312.48216 319.48216">&#x2022;all system clocks, except the core clock, are disabled,</tspan><tspan y="567.0499" x="13.106139 23.99814 27.89014 34.89014 41.10614 44.60614 51.60614 57.82214 64.82214 71.82214 78.82214 82.32214 93.21414 100.21414 107.21414 114.21414 118.10614 124.32214 127.82214 134.82215 141.03815 146.48415 149.98415 156.20015 162.41616 168.63216 174.84816 180.29416 185.74016 189.24016 193.13216 200.13216 203.63216 209.84816 216.84816 221.51016 227.72617 231.22617 235.88817 242.10417 249.10417 252.99617 258.44218 262.33418 268.55018 273.21217 278.65818 282.15818 285.65818 291.87419 298.87419">&#x2022;the debug module has access to core registers, and</tspan><tspan y="583.0499" x="13.106169 23.998169 30.214169 36.43017 42.646169 48.862169 54.308168 59.754167 63.254167 67.146167 74.146167 77.646167 81.53816 88.53816 94.754169 98.254169 105.254169 112.254169 116.91617 123.13217 130.13217 134.02417 141.02417 144.52417 151.52417 157.74018 162.40218 166.29418 173.29418 180.29418 186.51018 191.17218 197.38819 201.28018 206.72618 210.22618 214.11818 219.56418 223.06418 230.06418 233.95618 240.95618 247.17218 254.17218 260.38819 267.38819">&#x2022;access to the on-chip peripherals is blocked.</tspan><tspan y="609.0499" x=".0021791459 10.11018 17.11018 20.61018 27.61018 33.82618 40.82618 47.82618 54.82618 58.32618 62.21818 67.664188 71.164188 77.38019 84.38019 90.59619 94.48819 98.38019 104.59619 111.59619 115.48819 121.70419 125.20419 135.3122 142.3122 146.2042 150.09619 156.3122 159.8122 163.7042 170.7042 176.9202 180.4202 192.8662 202.2042 212.3122 215.8122 219.7042 225.15019 228.65019 232.54219 239.54219 243.04219 251.59619 260.15019 267.93418 271.43418 278.43418 283.09617 286.59617 296.70417 305.25816 313.81214 321.59614 325.09614 335.98814 342.98814 349.98814 356.20414 361.65016 365.15016 368.65016 377.20414 385.75813 393.5421 397.0421 400.9341 406.38014 409.88014 416.09614 419.59614 425.04216 428.93415 435.15016 439.04216 445.25816 449.92015 454.58213 460.79814 464.69013 470.90614 477.90614 481.79814 485.69013 492.69013">No debug is available while the MCU is in LLS or VLLS modes. LLS is a state-retention</tspan><tspan y="625.0499" x=".0022091459 10.89421 17.89421 24.89421 31.11021 34.61021 40.82621 47.82621 54.82621 58.32621 64.54221 68.43421 72.32621 75.82621 82.82621 89.04221 96.04221 103.04221 110.04221 113.54221 120.54221 127.54221 133.75821 138.42021 144.63622 148.52822 152.42021 159.42021 166.42021 169.92021 176.13622 182.35222 189.35222 192.85222 199.06822 206.06822 213.06822 216.96022 220.85222 227.85222 234.85222 241.06822 244.56822 250.78423 255.44623 259.33824 265.55424 270.21623 273.71623 283.82423 290.04023 297.04023 300.93223 307.93223 314.93223 318.43223 323.0942 327.7562 334.7562 345.6482 349.1482 357.70219 366.25617 374.04017 377.54017 381.04017 387.25617 394.25617 400.47218 407.47218 410.97218 414.86418 421.86418 425.36418 431.58018 437.79618 443.2422 449.4582 454.9042 458.4042 468.5122 475.5122 481.7282 486.3902">mode and all debug operation can continue after waking from LLS, even in cases where</tspan><tspan y="641.0499" x=".0022591458 5.44826 12.448259 17.89426 21.78626 28.002263 38.894266 42.394266 52.502267 58.718267 65.71826 71.934268 78.934268 85.934268 89.434268 93.32626 98.77226 102.27226 109.27226 116.27226 122.488269 125.988269 129.88027 136.88027 140.38027 146.59627 150.09627 155.54227 162.54227 167.98827 171.88027 178.09627 188.98827 192.48827 197.15027 203.36627 208.81227 215.02828 218.92028 222.42028 228.63628 235.63628 241.85228 248.85228 252.74428">system wakeup is due to a system reset event.</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 54 18)" font-size="9" font-family="HelveticaLTStd" font-weight="bold"><tspan y="26.01031" x="351.468 357.96598 363.46498 368.46897 373.96797 376.96498 381.96897 385.46998 387.972 392.97599 397.97999 400.482 406.485 411.48899 416.49299 419.49 424.494 432.495 434.997 442.49403 447.993 453.492 458.496 460.99803 467.496 472.995 478.494 481.491 484.992 490.491 492.993 495.49504 500.49903">Chapter 14 System Mode Controller</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 734.93869)" font-size="10" font-family="HelveticaLTStd" font-weight="bold"><tspan y="8.59766" x="130.01 137.23 142.79 148.34999 151.12999 157.79999 163.90999 170.01999 173.34999 179.45999 185.01999 193.90999 196.68999 199.46999 205.02999 207.80998 215.02999 220.58998 223.91999 229.47998 233.36998 238.92998 245.03998 250.59998 256.15998 258.93998 267.26997 272.82997 278.93995 285.04994 290.60993 293.38993 296.16993 298.94993 306.16993 311.72993 317.28993 320.06993 322.8499 328.4099 331.1899 336.7499 342.8599 348.96989 351.74989 357.30989 362.86988 368.42988">K60 Sub-Family Reference Manual, Rev. 2 Jun 2012</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 751.756)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x=".00401 5.5030105 8.5000109 13.504011 18.50801 23.00801 27.50801 32.512014 34.510015 39.514017 42.016016 48.019014 53.023015 60.520017 62.518018 67.01802 72.02202 77.02602 82.030017 87.03401 91.53401 94.03601 99.04001 102.03701 104.53901 107.04101 109.54301 114.547008 119.047008">Freescale Semiconductor, Inc.</tspan></text>
<text fill="#ff0000" xml:space="preserve" transform="matrix(1 0 0 1 220.32 751.756)" font-size="10" font-family="HelveticaLTStd" font-weight="bold"><tspan y="8.59766" x="58.45 65.12 69.01 74.57 77.35 80.13 89.02 91.799999 97.909999 103.46999 107.35999">Preliminary</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 391.68 751.756)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="151.308 156.312 161.316">347</tspan></text>
<text fill="#ff0000" xml:space="preserve" transform="matrix(1 0 0 1 54 763.756)" font-size="10" font-family="HelveticaLTStd" font-weight="bold"><tspan y="8.59766" x="180.87 188.65 194.20999 200.31999 205.87999 209.76999 215.32999 218.10999 220.88999 228.10999 234.21999 239.77999 242.55998 248.66999 254.22998 259.78999 265.34999 268.12998 270.90998 277.01997 280.34996 286.45994 290.34996 299.23997 304.79997 308.12995 310.90995 317.01994">General Business Information</tspan></text>
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