Ryan Malloy
5252d1d73c
Allegro A3981 stepper motor driver: datasheet, KiCad symbols/footprint, 3D model (TSSOP-28). Two per G2 board, SPI-controlled, AUTO microstep. NXP MK60DN512VLQ10 (Kinetis K60): datasheet and 1300-page reference manual. Cortex-M4 96MHz MCU running the G2 firmware. Reyax RYS352A GPS module: datasheet and PAIR command guide. GPS receiver on the G2 board (used for auto-location/satellite lookup). All extracted as markdown + page images + vector SVGs for LLM context. Binary assets (PDFs, PNGs, SVGs, STEP, WRL) stored via git-lfs.
1076 lines
96 KiB (Stored with Git LFS)
XML
1076 lines
96 KiB (Stored with Git LFS)
XML
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<text xml:space="preserve" transform="matrix(1 0 0 1 157.05 92)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 5.499 10.503 15.507001 18.009 22.509 27.513 30.51 35.514 38.016 42.516 44.514 49.518 54.018 58.518 61.02 63.018 67.518009 70.020008 75.024 80.028 82.53 87.534 92.537998 95.03999 100.04399 102.54599 105.04799 107.54999 110.05199 115.55099 120.554988 125.55898 128.06099 132.56099 137.06099 141.56099 144.06299 149.06699 156.56398 159.06598 161.56798 166.57198 171.57598 176.07598 178.57798 181.07997 186.08397 191.08797 196.09197 198.59397 201.09597 203.09397 208.09796 212.59796 217.60196 220.10396 224.60396 226.60196 231.60596 236.10596 240.60596 245.10596 247.60796 252.10796 257.11198 262.11598 264.61799 266.61598 271.61997 276.62397 281.62797 284.12998 286.632 291.636 294.138 299.142 304.146 309.15 312.147 317.151 319.653 324.657 327.15904 329.66105 334.66505 336.66304 339.16505 344.16905 349.17304 354.17704 359.18104 364.18504 366.68705 369.18907 374.19306 379.19706 381.19505">The core clock is gated off. The system, bus, and flash clocks continue to operate, although their</tspan><tspan y="18.83789" x=".00004 7.4970409 12.501041 17.001042 18.999043 26.496045 31.500046 38.997049 41.499048 44.001047 46.998048 52.00205 57.00605 62.01005 67.01405 72.01805 76.51805 81.01805 83.52005 85.51805 90.01805 92.52005 95.51705 100.52105 105.02105 107.52305 110.52005 112.51805 117.01805 119.52005 124.52405 129.52805 132.03005 134.53205 140.53505 145.53905 150.54305 153.04505 155.54705 160.55104 165.55504 168.05704 174.06005 179.06404 185.56204 190.56604 193.56304 196.06504 203.56203 208.56603 213.57003 218.57402 223.57802 228.58202 236.07901 241.08301 246.087 248.589 251.091 255.591 260.595 265.599 270.603 273.105 278.109 281.10603 283.60804 286.11006 291.11405 294.11106 296.61308 301.61708 306.62107 309.12309 314.12709 316.12507 318.12306 322.62306 325.12507 330.12907 335.13307 337.63508 340.1371 345.14109 350.14509 352.6471 360.1441 365.1481 369.6481 371.6461 379.1431 384.1471">maximum frequency is restricted. See the Power Management chapter for details on the maximum</tspan><tspan y="29.83789" x=".00008 5.004081 7.002081 9.000081 14.004082 20.502083 25.506085 30.510087 32.508089 37.51209 40.014089 42.516088 45.51309 50.51709 55.52109 60.525094 65.52909 70.53309 75.03309 77.03109 82.03509 86.53509">allowable frequencies.</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 56.25 129.5)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 6.0030004 11.007001 17.010003">VLPS</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 157.05 129.5)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 5.499 10.503 15.507001 18.009 22.509 27.513 30.51 35.514 38.016 42.516 44.514 49.518 54.018 58.518 61.02 63.018 67.518009 70.020008 75.024 80.028 82.53 87.534 92.537998 95.03999 100.04399 102.54599 105.04799 107.54999 110.05199 116.054988 120.554988 125.054988 127.556987 132.56099 140.05799 142.55998 147.05998 149.05799 154.06198 158.56198 163.06198 167.56198 170.06398 172.56598 177.56998 180.07198 185.07598 187.57798 192.58197 197.58597 200.58296 203.08496 210.58196 215.58596 220.08596 222.58795 227.59195 230.58895 235.08895 237.59095 242.59494 247.59894 252.60294 255.10494 260.10896 265.11296 269.61296 272.11497 276.61497 278.61296 283.61695 288.11695 292.61695 297.11695 299.61897 304.62297 307.61997 312.62397 315.12599 320.12998 325.13398 327.636 332.63999 337.64399 340.146 345.15 347.652 350.15403 352.65605 357.66004 360.16206 362.66407 367.66807 370.66508 373.16709 378.17109 380.16908">The core clock is gated off. System clocks to other masters and bus clocks are gated off after all</tspan><tspan y="18.83789" x="0 4.5 7.0020005 12.0060009 17.010003 19.512003 24.516003 29.016003 33.516004 38.520006 43.524007 50.022008 52.020009 57.02401 62.02801 67.03201 72.03601 74.53801 79.03801 81.03601 86.04001 91.04401 96.048007 98.046009 102.546009 105.048007 107.55 110.547008 115.551 123.048007 125.55 130.05 135.054 140.058 145.062 150.066 153.06299 155.56499 157.56299 162.56699 167.57099 170.07299 175.07698 180.08098 183.07798 185.07598 190.07997 195.08397 200.08797 203.08496 208.08896 210.08696 214.58696 217.08896 222.09296 225.08995 230.09395 232.59595 237.09595 242.09995 244.09795 246.09595 251.09995">stop acknowledge signals from supporting peripherals are valid.</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 56.25 156)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 5.0040009 10.008001">LLS</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 157.05 156)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 5.499 10.503 15.507001 18.009 22.509 27.513 30.51 35.514 38.016 42.516 44.514 49.518 54.018 58.518 61.02 63.018 67.518009 70.020008 75.024 80.028 82.53 87.534 92.537998 95.03999 100.04399 102.54599 105.04799 107.54999 110.05199 116.054988 120.554988 125.054988 127.556987 132.56099 140.05799 142.55998 147.05998 149.05799 154.06198 158.56198 163.06198 167.56198 170.06398 172.56598 177.56998 180.07198 185.07598 187.57798 192.58197 197.58597 200.58296 203.08496 210.58196 215.58596 220.08596 222.58795 227.59195 230.58895 235.08895 237.59095 242.59494 247.59894 252.60294 255.10494 260.10896 265.11296 269.61296 272.11497 276.61497 278.61296 283.61695 288.11695 292.61695 297.11695 299.61897 304.62297 307.61997 312.62397 315.12599 320.12998 325.13398 327.636 332.63999 337.64399 340.146 345.15 347.652 350.15403 352.65605 357.66004 360.16206 362.66407 367.66807 370.66508 373.16709 378.17109 380.16908">The core clock is gated off. System clocks to other masters and bus clocks are gated off after all</tspan><tspan y="18.83789" x="0 4.5 7.0020005 12.0060009 17.010003 19.512003 24.516003 29.016003 33.516004 38.520006 43.524007 50.022008 52.020009 57.02401 62.02801 67.03201 72.03601 74.53801 79.03801 81.03601 86.04001 91.04401 96.048007 98.046009 102.546009 105.048007 107.55 110.547008 115.551 123.048007 125.55 130.05 135.054 140.058 145.062 150.066 153.06299 155.56499 157.56299 162.56699 167.57099 170.07299 175.07698 180.08098 183.07798 185.07598 190.07997 195.08397 200.08797 203.08496 208.08896 210.08696 214.58696 217.08896 222.09296 225.08995 230.09395 232.59595 237.09595 242.09995 244.09795 246.09595 251.09995 253.60195 256.10395 261.60295 266.60694 271.61094 274.11296 281.60997 288.10795 294.60594 297.10795 299.10594 303.60594 306.10795 311.11195 313.10993 318.11393 322.61393 327.61793 332.62193 335.12394 337.12193 342.12593 344.62794 349.63194 352.13395 354.13194 359.13594">stop acknowledge signals from supporting peripherals are valid. The MCU is placed in a low</tspan><tspan y="29.83789" x="0 1.9980002 7.002001 12.006001 16.506 21.510003 26.514004 31.518006 34.020006 41.517007 46.521009 51.52501 56.52901 59.03101 64.03501 68.53501 71.03701 74.03401 79.03801 84.04201 89.046009 93.546009 95.54401 100.548007 105.552 108.054 110.556 115.56 120.563999 123.065998 127.565998 132.56999 134.568 137.06999 142.07399 147.07799 152.08199 154.58399 157.08599 162.08998 164.59198 166.58998 171.59398 174.09598 179.09998 182.09697 187.10097 192.10497 194.10297 196.60497 198.60297 203.60697 208.61096 210.60897 215.10897 217.61096 220.11296 222.61496 227.61896 230.12096 235.12496 238.12195 243.12595 248.12995 250.12795 252.62995 254.62795 259.63197 264.63597 266.63395 271.13395 273.63597 278.13597 280.63798 285.64198 288.14399 293.14799 297.64799 300.15 305.154 308.151 313.155 315.657 318.65403 323.65803 326.16004 331.16404 333.16203 338.16603 343.17 348.174">leakage mode by reducing the voltage to internal logic. Internal logic states are retained.</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 56.25 193.5)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 6.0030004 11.007001 16.011002 22.014002">VLLS3</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 157.05 193.5)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 5.499 10.503 15.507001 18.009 22.509 27.513 30.51 35.514 38.016 42.516 44.514 49.518 54.018 58.518 61.02 63.018 67.518009 70.020008 75.024 80.028 82.53 87.534 92.537998 95.03999 100.04399 102.54599 105.04799 107.54999 110.05199 116.054988 120.554988 125.054988 127.556987 132.56099 140.05799 142.55998 147.05998 149.05799 154.06198 158.56198 163.06198 167.56198 170.06398 172.56598 177.56998 180.07198 185.07598 187.57798 192.58197 197.58597 200.58296 203.08496 210.58196 215.58596 220.08596 222.58795 227.59195 230.58895 235.08895 237.59095 242.59494 247.59894 252.60294 255.10494 260.10896 265.11296 269.61296 272.11497 276.61497 278.61296 283.61695 288.11695 292.61695 297.11695 299.61897 304.62297 307.61997 312.62397 315.12599 320.12998 325.13398 327.636 332.63999 337.64399 340.146 345.15 347.652 350.15403 352.65605 357.66004 360.16206 362.66407 367.66807 370.66508 373.16709 378.17109 380.16908">The core clock is gated off. System clocks to other masters and bus clocks are gated off after all</tspan><tspan y="18.83789" x="0 4.5 7.0020005 12.0060009 17.010003 19.512003 24.516003 29.016003 33.516004 38.520006 43.524007 50.022008 52.020009 57.02401 62.02801 67.03201 72.03601 74.53801 79.03801 81.03601 86.04001 91.04401 96.048007 98.046009 102.546009 105.048007 107.55 110.547008 115.551 123.048007 125.55 130.05 135.054 140.058 145.062 150.066 153.06299 155.56499 157.56299 162.56699 167.57099 170.07299 175.07698 180.08098 183.07798 185.07598 190.07997 195.08397 200.08797 203.08496 208.08896 210.08696 214.58696 217.08896 222.09296 225.08995 230.09395 232.59595 237.09595 242.09995 244.09795 246.09595 251.09995 253.60195 256.10395 261.60295 266.60694 271.61094 274.11296 281.60997 288.10795 294.60594 297.10795 299.10594 303.60594 306.10795 311.11195 313.10993 318.11393 322.61393 327.61793 332.62193 335.12394 337.12193 342.12593 344.62794 349.63194 352.13395 354.13194 359.13594">stop acknowledge signals from supporting peripherals are valid. The MCU is placed in a low</tspan><tspan y="29.83789" x="0 1.9980002 7.002001 12.006001 16.506 21.510003 26.514004 31.518006 34.020006 41.517007 46.521009 51.52501 56.52901 59.03101 64.03501 68.53501 71.03701 76.04101 81.045009 87.54301 92.547008 95.54401 97.54201 102.546009 107.55 110.052 115.056 120.06 126.558 131.562 134.064 136.566 141.56999 146.57399 149.07599 151.07399 156.07799 158.57999 163.58399 166.58098 171.58498 176.58898 178.58698 181.08898 183.08698 188.09098 193.09497 195.09297 199.59297 202.09497 204.59697 210.59998 212.59798 214.59598 217.09798 221.59798 226.09798 230.59798 233.09998 238.10398 245.60097 248.10297 254.60097 260.60398 268.10099 270.603 275.103 280.107 285.111 287.613 292.617 297.621 300.12303 304.62303 307.12504 312.12904 315.12605 320.13005 322.63206 325.62907 330.63307 333.13508 338.13908 340.13706 345.14106 350.14506 355.14906 357.65107 362.65507 367.65907 372.66307 375.16508 377.66709 380.1691">leakage mode by powering down the internal logic. All system RAM contents are retained and I/O</tspan><tspan y="40.83789" x="0 4.5 7.0020005 12.0060009 14.508001 19.512001 24.012001 26.514002 31.518002 34.515005 39.519006 42.021005 47.025007 52.029008 54.027009 59.03101 61.53301 64.03501 66.53701 71.54101 74.04301 79.047008 82.04401 87.048007 92.052 94.05 96.552 98.55 103.554 108.558 110.556 115.056 117.558 122.058 124.56 129.564 132.066 137.06999 141.56999 144.07199 149.07599 152.07299 157.07698 159.57898 164.58298 169.58698 172.08898 174.59098 177.58797 182.59197 185.09397 190.09796 192.09597 197.09996 202.10396 207.10796">states are held. Internal logic states are not retained.</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 56.25 242)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 6.0030004 11.007001 16.011002 22.014002">VLLS2</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 157.05 242)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 5.499 10.503 15.507001 18.009 22.509 27.513 30.51 35.514 38.016 42.516 44.514 49.518 54.018 58.518 61.02 63.018 67.518009 70.020008 75.024 80.028 82.53 87.534 92.537998 95.03999 100.04399 102.54599 105.04799 107.54999 110.05199 116.054988 120.554988 125.054988 127.556987 132.56099 140.05799 142.55998 147.05998 149.05799 154.06198 158.56198 163.06198 167.56198 170.06398 172.56598 177.56998 180.07198 185.07598 187.57798 192.58197 197.58597 200.58296 203.08496 210.58196 215.58596 220.08596 222.58795 227.59195 230.58895 235.08895 237.59095 242.59494 247.59894 252.60294 255.10494 260.10896 265.11296 269.61296 272.11497 276.61497 278.61296 283.61695 288.11695 292.61695 297.11695 299.61897 304.62297 307.61997 312.62397 315.12599 320.12998 325.13398 327.636 332.63999 337.64399 340.146 345.15 347.652 350.15403 352.65605 357.66004 360.16206 362.66407 367.66807 370.66508 373.16709 378.17109 380.16908">The core clock is gated off. System clocks to other masters and bus clocks are gated off after all</tspan><tspan y="18.83789" x="0 4.5 7.0020005 12.0060009 17.010003 19.512003 24.516003 29.016003 33.516004 38.520006 43.524007 50.022008 52.020009 57.02401 62.02801 67.03201 72.03601 74.53801 79.03801 81.03601 86.04001 91.04401 96.048007 98.046009 102.546009 105.048007 107.55 110.547008 115.551 123.048007 125.55 130.05 135.054 140.058 145.062 150.066 153.06299 155.56499 157.56299 162.56699 167.57099 170.07299 175.07698 180.08098 183.07798 185.07598 190.07997 195.08397 200.08797 203.08496 208.08896 210.08696 214.58696 217.08896 222.09296 225.08995 230.09395 232.59595 237.09595 242.09995 244.09795 246.09595 251.09995 253.60195 259.10096 264.10496 269.10896 271.61097 279.10798 285.60597 292.10395 294.60597 296.60395 301.10395 303.60597 308.60997 310.60795 315.61195 320.11195 325.11595 330.11994 332.62196 334.61994 339.62394 342.12596 347.12995 349.63197 351.62995 356.63395 363.13194 365.63395 367.63194 372.63594 377.63993 382.13993 387.14393 392.14793">stop acknowledge signals from supporting peripherals are valid.The MCU is placed in a low leakage</tspan><tspan y="29.83789" x=".00004 7.4970409 12.501041 17.505043 22.509045 25.011046 30.015046 34.515047 37.017045 42.021047 47.025049 53.52305 58.52705 61.52405 63.522054 68.526058 73.53005 76.03205 81.03605 86.04005 92.53805 97.542049 100.044048 102.54604 107.55004 112.55404 115.05604 117.05404 122.05804 124.560039 129.56404 132.56104 137.56504 142.56903 144.56703 147.06903 149.06703 154.07103 159.07503 161.07303 165.57303 168.07503 173.07903 178.08303 183.08702 185.58902 188.09102 193.09502 198.09902 200.60102 205.10102 209.60102 214.10102 216.60301 221.60701 229.104 231.606 238.104 244.10701 251.604 256.608 259.11003 264.114 269.118 272.11503 274.61705 276.61503 279.11705 281.11503 286.11903 291.12303 293.62504 296.12705 301.62605 306.63005 311.63404 314.13606 318.63606 323.13606 327.63606 330.13807 335.14207 342.63908 345.14109 351.63908 357.64207 365.13908">mode by powering down the internal logic and the system RAM3 partition. The system RAM2</tspan><tspan y="40.83789" x=".00004 5.0040409 10.008041 13.005041 15.507042 17.505043 20.007044 22.005043 27.009045 32.013048 34.515047 39.015047 44.019048 49.02305 51.525049 56.52905 61.53305 64.03505 69.03905 74.043048 76.545047 78.543048 83.54704 88.55104 93.55504 95.55304 97.55104 102.05104 104.55304 107.55004 112.55404 115.05604 120.060039 122.05804 127.062038 132.06604 137.07004 139.57204 144.57604 149.07604 151.07404 156.07804 161.08203 163.58403 169.58704 174.59104 179.59503 185.59804 192.09604 197.59503 204.09304 209.09703 211.59903 218.09703 224.10004 231.59703 236.60103 242.60404 249.60604 252.10803 254.61003 257.11204 262.61103 267.61503 272.61903 275.12104 279.62104 284.12104 288.62104 291.12306 296.12705 303.62406 306.12608 312.62406 318.62705 326.12406 331.12806 333.63008 338.63407 343.63807 346.63508 349.1371 351.13508 353.6371 355.63508 360.63908">partition can be optionally retained using VLLSCTRL[RAM2PO]. The system RAM1 partition</tspan><tspan y="51.83789" x=".00004 4.50004 9.504041 14.508041 17.010043 22.014042 27.018044 29.520045 34.020044 36.52204 41.526044 44.523046 49.527048 52.029047 55.026048 60.03005 62.532049 67.53605 69.53405 74.53805 79.542049 84.54604 87.04804 89.04604 94.05004 96.55204 99.05404 104.05804 106.05604 110.55604 113.05804 120.55504 125.55904 130.56304 135.56703 138.06903 140.57103 143.07303 148.07703 150.57903 155.58303 158.58002 163.58402 168.58802 170.58602 173.08802 175.08602 180.09001 185.09401 187.09201 191.59201 194.09401 198.59401 201.09601 206.1 208.602 213.606 218.106 220.608 225.612 228.609 233.61299 236.11499 241.11899 246.12299 248.62499 251.12699 254.12398 259.128 261.63 266.634 268.632 273.636 278.63999 283.64399 286.146">contents are retained in this mode. Internal logic states are not retained. </tspan></text>
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<text fill="#0000ff" xml:space="preserve" transform="matrix(1 0 0 1 157.05 242)" font-size="6.75" font-family="HelveticaLTStd"><tspan y="48.83789" x="288.64805">1</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 56.25 301.5)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 6.0030004 11.007001 16.011002 22.014002">VLLS1</tspan></text>
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<g clip-path="url(#clip_14)">
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<text xml:space="preserve" transform="matrix(1 0 0 1 157.05 301.5)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 5.499 10.503 15.507001 18.009 22.509 27.513 30.51 35.514 38.016 42.516 44.514 49.518 54.018 58.518 61.02 63.018 67.518009 70.020008 75.024 80.028 82.53 87.534 92.537998 95.03999 100.04399 102.54599 105.04799 107.54999 110.05199 116.054988 120.554988 125.054988 127.556987 132.56099 140.05799 142.55998 147.05998 149.05799 154.06198 158.56198 163.06198 167.56198 170.06398 172.56598 177.56998 180.07198 185.07598 187.57798 192.58197 197.58597 200.58296 203.08496 210.58196 215.58596 220.08596 222.58795 227.59195 230.58895 235.08895 237.59095 242.59494 247.59894 252.60294 255.10494 260.10896 265.11296 269.61296 272.11497 276.61497 278.61296 283.61695 288.11695 292.61695 297.11695 299.61897 304.62297 307.61997 312.62397 315.12599 320.12998 325.13398 327.636 332.63999 337.64399 340.146 345.15 347.652 350.15403 352.65605 357.66004 360.16206 362.66407 367.66807 370.66508 373.16709 378.17109 380.16908">The core clock is gated off. System clocks to other masters and bus clocks are gated off after all</tspan><tspan y="18.83789" x="0 4.5 7.0020005 12.0060009 17.010003 19.512003 24.516003 29.016003 33.516004 38.520006 43.524007 50.022008 52.020009 57.02401 62.02801 67.03201 72.03601 74.53801 79.03801 81.03601 86.04001 91.04401 96.048007 98.046009 102.546009 105.048007 107.55 110.547008 115.551 123.048007 125.55 130.05 135.054 140.058 145.062 150.066 153.06299 155.56499 157.56299 162.56699 167.57099 170.07299 175.07698 180.08098 183.07798 185.07598 190.07997 195.08397 200.08797 203.08496 208.08896 210.08696 214.58696 217.08896 222.09296 225.08995 230.09395 232.59595 237.09595 242.09995 244.09795 246.09595 251.09995 253.60195 256.10395 261.60295 266.60694 271.61094 274.11296 281.60997 288.10795 294.60594 297.10795 299.10594 303.60594 306.10795 311.11195 313.10993 318.11393 322.61393 327.61793 332.62193 335.12394 337.12193 342.12593 344.62794 349.63194 352.13395 354.13194 359.13594">stop acknowledge signals from supporting peripherals are valid. The MCU is placed in a low</tspan><tspan y="29.83789" x="0 1.9980002 7.002001 12.006001 16.506 21.510003 26.514004 31.518006 34.020006 41.517007 46.521009 51.52501 56.52901 59.03101 64.03501 68.53501 71.03701 76.04101 81.045009 87.54301 92.547008 95.54401 97.54201 102.546009 107.55 110.052 115.056 120.06 126.558 131.562 134.064 136.566 141.56999 146.57399 149.07599 151.07399 156.07799 158.57999 163.58399 166.58098 171.58498 176.58898 178.58698 181.08898 183.08698 188.09098 193.09497 195.09297 199.59297 202.09497 207.09897 212.10297 217.10697 219.60897 224.61296 226.61096 228.60897 231.11096 235.61096 240.11096 244.61096 247.11296 252.11696 259.61396 262.11598 268.61396 274.61695 282.11396 284.61598 287.11799 289.62 292.122 299.12403 301.62605 306.12605 308.62806 313.63206 316.13407 321.13807 325.63807 328.14009 333.14408 336.14109 341.14509 343.6471 348.6511 353.6551 355.65309 360.65708 363.1591 365.6611 368.16313 373.1671 375.66914 380.67314 383.67015 388.67414 393.67814">leakage mode by powering down the internal logic and all system RAM. I/O states are held. Internal</tspan><tspan y="40.83789" x="0 1.9980002 7.002001 12.006001 14.004002 18.504002 21.006003 25.506003 28.008004 33.012006 35.514005 40.518007 45.018007 47.520006 52.524007 55.521009 60.52501 63.027009 68.031009 73.035 75.537 78.039 81.036 86.04 88.542 93.546 95.544 100.548 105.551998 110.55599">logic states are not retained.</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 54 365)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 5.0040009">1.</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 69.12 365)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 6.0030004 11.007001 16.011002 18.513003 21.015004 26.019005 31.023007 33.525007 38.529008 43.53301 48.03301 50.03101 54.53101 59.53501 64.03501 65.75401 68.25601 72.75601 77.76001 79.75801 84.76201 87.26401 91.76401 96.768009 101.772 104.274 106.272 111.276 116.28 119.277 124.281 126.783 128.78099 133.78499 138.78899 141.29099 146.29499 151.29898 153.80098 158.80498 160.80298 162.80098 167.30098 169.80298 172.30498 177.30898 180.30597 182.80797 185.30997 190.31397 195.31797 197.81996 202.31996 204.31797 208.81797 213.82196 216.32396 221.32796 226.33196 231.33596 233.83795 235.83596 240.83995 245.33995 250.34395 252.84595 254.84395 259.84797 264.85197 267.35398 272.35798 274.86 277.362 279.864 284.868 289.872 292.37403 296.87403 301.37403 305.87403 308.37605 313.38005 320.87705 323.37907 329.87705 335.88005 343.37705 345.87907 350.88307 355.88706 358.88407 361.38609 363.38407 365.88609 367.88407 372.88807 377.89207 382.39207">See the devices' chip configuration details for the size and location of the system RAM partitions.</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 54.000005 419.8)" font-size="17" font-family="HelveticaLTStd" font-weight="bold"><tspan y="12.91602" x="-.00296 9.44904 18.901041 23.62704">14.3</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 101.25537 419.8)" font-size="17" font-family="HelveticaLTStd" font-weight="bold"><tspan y="12.91602" x="-.00296 14.158041 23.610043 38.723047 49.110048 55.723047 65.17505 69.90105 85.014049 94.46605 104.85305 109.57905 119.03105 129.41805 139.80504 144.53104 151.14405 160.59604 170.98303 175.70903 185.16103 190.82202 200.27402 206.88703 211.61302 222.00002 231.45201 240.904 250.356 256.969 261.695 272.082 277.743 282.46903 292.85603 303.243">Memory map and register descriptions</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 54 54)" font-size="14" font-family="TimesLTStd"><tspan y="403.05" x=".00506 10.113061 16.329062 20.221062 26.437062 30.329062 34.22106 39.66706 43.16706 47.82906 54.82906 58.72106 62.613065 69.61307 79.72107 83.22107 89.43707 96.43707 103.43707 110.43707 114.32907 117.82907 121.72107 128.72107 134.93708 138.43708 143.09908 149.31508 156.31508 160.20708 165.65308 169.54508 175.76108 180.42308 185.86908 189.36908 194.03108 200.24709 204.13909 210.35509 214.24709 220.46309 227.46309 230.96309 234.85509 241.85509 245.35509 249.24709 256.24708 262.46308 265.96308 271.4091 278.4091 283.8551 287.7471 293.9631 304.8551 308.3551 319.2471 326.2471 333.2471 339.4631 342.9631 349.1791 356.1791 363.1791 367.0711 371.7331 378.7331 382.6251 386.5171 392.7331 397.39509">Details follow about the registers related to the system mode controller.</tspan><tspan y="427.44999" x=".00509 10.1130909 14.005091 18.667092 23.329092 29.545094 34.207094 40.42309 47.42309 51.315095 54.815095 62.599096 75.0451 84.3831 87.8831 92.545108 98.76111 105.76111 109.65311 115.099109 118.991107 125.20711 129.86911 135.31511 138.81511 143.47711 149.69312 155.13912 161.35512 165.24712 168.74712 175.74712 182.74712 186.24712 193.24712 197.13912 201.80112 206.46312 212.67913 217.34113 223.55713 230.55713 234.44913 237.94913 242.61113 248.82714 254.27313 260.48915 264.38114 267.88114 271.77314 278.77314 285.77314 291.98915 297.43516 300.93516 304.43516 312.98915 319.20515 325.42115 332.42115 335.92115 340.58314 346.79914 353.79914 357.69114 363.13716 367.02915 373.24516 377.90715 380.42713 385.87315 389.37315 396.37315 402.58915 408.03517 414.25117 418.91316 422.80516 429.80516 433.69715 437.58915 444.58915 451.58915 455.08915 462.08915 466.75114 473.75114 480.75114 484.64314 491.64314 497.85914">Different SMC registers reset on different reset types. Each register's description provides</tspan><tspan y="443.44999" x=".00509 7.00509 13.22109 17.11309 23.32909 27.22109 31.11309 36.55909 40.05909 43.55909 51.34309 58.34309 63.00509 66.50509 77.39709 84.39709 89.05909 95.27509 98.77509 102.66709 109.66709 114.329097 121.329097 125.9911 136.8831 143.0991 146.9911 150.8831 157.8831 164.8831 168.3831 174.5991 181.5991 188.5991 195.5991 199.4911 202.9911 206.8831 213.8831 220.0991 223.5991 227.4911 234.4911 241.4911 247.7071 253.1531 256.6531 263.6531 268.3151 271.8151 276.47709 282.69309 288.1391 294.3551 298.2471 301.7471 308.7471 315.7471 319.2471 323.1391 330.1391 334.0311 339.4771 342.9771 349.1931 356.1931 360.0851 367.0851 370.5851 374.0851 378.7471 384.9631 389.6251 395.8411 400.50309 404.00309 407.89509 414.89509 418.39509 422.28709 429.28709 435.50309 439.00309 448.3411 454.5571 460.0031 466.21913">details. For more information about the types of reset on this chip, refer to the Reset</tspan><tspan y="459.44999" x=".00509 5.451091 11.667091 17.883091 21.775092 25.667092 32.66709 39.66709 43.16709 50.16709 56.38309 60.275094 66.4911 70.383098 74.27509 79.72109">section details.</tspan></text>
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<path transform="matrix(1,0,0,1,54,54)" d="M0 473.59999H504.00004V594.1H0Z" fill="#ffffff" fill-rule="evenodd"/>
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<text xml:space="preserve" transform="matrix(1 0 0 1 54 527.6)" font-size="12" font-family="HelveticaLTStd" font-weight="bold"><tspan y="10.11719" x="199.65708 207.66107 217.65708 226.32108 229.65708 240.32508 246.99707 257.66508 264.99708 269.66508 276.33708 279.67308 290.34107 297.01307">SMC memory map</tspan></text>
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</g>
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<text xml:space="preserve" transform="matrix(1 0 0 1 56.5 549.6)" font-size="9" font-family="HelveticaLTStd" font-weight="bold"><tspan y="7.83789" x="8.487 14.985001 20.484002 25.488003 30.987004 33.489004 38.988004 41.985006">Absolute</tspan><tspan y="18.83789" x="10.485001 15.489001 20.988 26.487002 29.988 34.992 39.996004">address</tspan><tspan y="29.83789" x="16.992 19.989 25.488 30.492 35.496004">(hex)</tspan></text>
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<g clip-path="url(#clip_53)">
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<path transform="matrix(1,0,0,1,54,547.1)" d="M60.98 .5H306.94V37.5H60.98Z" fill="#ffffff" fill-rule="evenodd"/>
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</g>
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<text xml:space="preserve" transform="matrix(1 0 0 1 116.979999 549.6)" font-size="9" font-family="HelveticaLTStd" font-weight="bold"><tspan y="18.83789" x="89.973 96.471 101.475 106.974 109.476 114.479999 117.477 122.480998 125.981998 128.484 133.98299 138.98699 146.98799">Register name</tspan></text>
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<g clip-path="url(#clip_54)">
|
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<path transform="matrix(1,0,0,1,53.999998,547.1)" d="M307.94 .5H347.26V37.5H307.94Z" fill="#ffffff" fill-rule="evenodd"/>
|
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</g>
|
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<text xml:space="preserve" transform="matrix(1 0 0 1 363.94 549.6)" font-size="9" font-family="HelveticaLTStd" font-weight="bold"><tspan y="13.33789" x="5.166 13.662001 16.164002 21.663002 24.660002">Width</tspan><tspan y="24.33789" x="1.4129999 4.41 6.912 12.411 14.913 20.412 22.914002 25.911002 30.915">(in bits)</tspan></text>
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|
<g clip-path="url(#clip_55)">
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<path transform="matrix(1,0,0,1,54,547.1)" d="M348.26 .5H387.58003V37.5H348.26Z" fill="#ffffff" fill-rule="evenodd"/>
|
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</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 404.26 549.6)" font-size="9" font-family="HelveticaLTStd" font-weight="bold"><tspan y="18.83789" x="1.899 8.397 13.401001 18.405003 23.409005 28.413006">Access</tspan></text>
|
|
<g clip-path="url(#clip_56)">
|
|
<path transform="matrix(1,0,0,1,54,547.1)" d="M388.58003 .5H448.06004V37.5H388.58003Z" fill="#ffffff" fill-rule="evenodd"/>
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</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 444.58003 549.6)" font-size="9" font-family="HelveticaLTStd" font-weight="bold"><tspan y="18.83789" x="2.727 9.225 14.229001 19.233002 24.237004 27.234004 29.736004 34.740007 39.744009 42.246007 47.745008">Reset value</tspan></text>
|
|
<g clip-path="url(#clip_57)">
|
|
<path transform="matrix(1,0,0,1,54,547.1)" d="M449.06004 .5H503.50004V37.5H449.06004Z" fill="#ffffff" fill-rule="evenodd"/>
|
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</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 505.06004 549.6)" font-size="9" font-family="HelveticaLTStd" font-weight="bold"><tspan y="13.33789" x="7.713 13.716 18.720002 23.724003 26.721003 29.223004 34.722005 40.221006">Section/</tspan><tspan y="24.33789" x="14.715 20.214 25.218003 30.717003">page</tspan></text>
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<g clip-path="url(#clip_58)">
|
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<path transform="matrix(1,0,0,1,54,585.1)" d="M.25 .5H60.23V15.5H.25Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 56.25 587.6)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="4.977 9.981001 14.985002 19.989003 24.993004 29.997006 36.000009 41.00401 46.00801">4007_E000</tspan></text>
|
|
<g clip-path="url(#clip_59)">
|
|
<path transform="matrix(1,0,0,1,54,585.1)" d="M60.73 .5H307.19V15.5H60.73Z" fill="#ffffff" fill-rule="evenodd"/>
|
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</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 116.729999 587.6)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 6.0030004 11.007001 17.505002 22.509003 25.506003 28.008004 35.505006 40.509008 45.51301 50.51701 53.01901 59.02201 62.019014 67.02301 69.52501 74.52901 79.02901 81.531009 83.52901 88.533008 93.537 96.039 99.036 104.04 109.044 111.042 115.542 118.044 123.048 126.045 128.547 131.54399 137.547 145.04399 151.54199 156.54599 162.549 170.04599 176.049 182.547 189.549 195.04799">Power Mode Protection register (SMC_PMPROT)</tspan></text>
|
|
<g clip-path="url(#clip_60)">
|
|
<path transform="matrix(1,0,0,1,53.999998,585.1)" d="M307.69 .5H347.51V15.5H307.69Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 363.69 587.6)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="15.408">8</tspan></text>
|
|
<g clip-path="url(#clip_61)">
|
|
<path transform="matrix(1,0,0,1,54,585.1)" d="M348.01 .5H387.83003V15.5H348.01Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 404.01 587.6)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="9.162 15.66 18.162">R/W</tspan></text>
|
|
<g clip-path="url(#clip_62)">
|
|
<path transform="matrix(1,0,0,1,54,585.1)" d="M388.33003 .5H448.31004V15.5H388.33003Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 444.33003 587.6)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="17.982 22.986 27.990002 32.994005">000h</tspan></text>
|
|
<g clip-path="url(#clip_63)">
|
|
<path transform="matrix(1,0,0,1,54,585.1)" d="M448.81004 .5H503.75004V15.5H448.81004Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
</g>
|
|
<text fill="#0000ff" xml:space="preserve" transform="matrix(1 0 0 1 504.81004 587.6)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="4.203 9.207001 14.211001 16.713002 21.717003 24.219004 29.223004 31.725005 36.729005 41.733007">14.3.1/332</tspan></text>
|
|
<g clip-path="url(#clip_64)">
|
|
<path transform="matrix(1,0,0,1,54,600.85)" d="M.25 .25H60.23V15.25H.25Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 56.25 603.1)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="4.977 9.981001 14.985002 19.989003 24.993004 29.997006 36.000009 41.00401 46.00801">4007_E001</tspan></text>
|
|
<g clip-path="url(#clip_65)">
|
|
<path transform="matrix(1,0,0,1,54,600.85)" d="M60.73 .25H307.19V15.25H60.73Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 116.729999 603.1)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 6.0030004 11.007001 17.505002 22.509003 25.506003 28.008004 35.505006 40.509008 45.51301 50.51701 53.01901 59.51701 64.52101 69.52501 72.02701 75.02401 80.02801 82.02601 84.52801 87.52501 92.52901 97.533008 99.531009 104.031009 106.533008 111.537 114.534008 117.036 120.033008 126.036 133.533 140.031 145.035 151.03801 158.535 165.033 170.532 177.03 182.034">Power Mode Control register (SMC_PMCTRL)</tspan></text>
|
|
<g clip-path="url(#clip_66)">
|
|
<path transform="matrix(1,0,0,1,53.999998,600.85)" d="M307.69 .25H347.51V15.25H307.69Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 363.69 603.1)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="15.408">8</tspan></text>
|
|
<g clip-path="url(#clip_67)">
|
|
<path transform="matrix(1,0,0,1,54,600.85)" d="M348.01 .25H387.83003V15.25H348.01Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 404.01 603.1)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="9.162 15.66 18.162">R/W</tspan></text>
|
|
<g clip-path="url(#clip_68)">
|
|
<path transform="matrix(1,0,0,1,54,600.85)" d="M388.33003 .25H448.31004V15.25H388.33003Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 444.33003 603.1)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="17.982 22.986 27.990002 32.994005">000h</tspan></text>
|
|
<g clip-path="url(#clip_69)">
|
|
<path transform="matrix(1,0,0,1,54,600.85)" d="M448.81004 .25H503.75004V15.25H448.81004Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
</g>
|
|
<text fill="#0000ff" xml:space="preserve" transform="matrix(1 0 0 1 504.81004 603.1)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="4.203 9.207001 14.211001 16.713002 21.717003 24.219004 29.223004 31.725005 36.729005 41.733007">14.3.2/333</tspan></text>
|
|
<g clip-path="url(#clip_70)">
|
|
<path transform="matrix(1,0,0,1,54,616.35)" d="M.25 .25H60.23V15.25H.25Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 56.25 618.6)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="4.977 9.981001 14.985002 19.989003 24.993004 29.997006 36.000009 41.00401 46.00801">4007_E002</tspan></text>
|
|
<g clip-path="url(#clip_71)">
|
|
<path transform="matrix(1,0,0,1,54,616.35)" d="M60.73 .25H307.19V15.25H60.73Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 116.729999 618.6)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 6.0030004 11.007001 16.011002 22.014002 24.516003 31.014004 36.018007 41.022008 43.524007 46.521009 51.52501 53.52301 56.02501 59.02201 64.02601 69.03001 71.02801 75.52801 78.03001 83.034008 86.031009 88.533008 91.53001 97.533008 105.03001 111.52801 116.532009 122.535 127.539 132.543 138.546 145.044 150.543 157.041 162.045">VLLS Control register (SMC_VLLSCTRL)</tspan></text>
|
|
<g clip-path="url(#clip_72)">
|
|
<path transform="matrix(1,0,0,1,53.999998,616.35)" d="M307.69 .25H347.51V15.25H307.69Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 363.69 618.6)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="15.408">8</tspan></text>
|
|
<g clip-path="url(#clip_73)">
|
|
<path transform="matrix(1,0,0,1,54,616.35)" d="M348.01 .25H387.83003V15.25H348.01Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 404.01 618.6)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="9.162 15.66 18.162">R/W</tspan></text>
|
|
<g clip-path="url(#clip_74)">
|
|
<path transform="matrix(1,0,0,1,54,616.35)" d="M388.33003 .25H448.31004V15.25H388.33003Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 444.33003 618.6)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="17.982 22.986 27.990002 32.994005">033h</tspan></text>
|
|
<g clip-path="url(#clip_75)">
|
|
<path transform="matrix(1,0,0,1,54,616.35)" d="M448.81004 .25H503.75004V15.25H448.81004Z" fill="#ffffff" fill-rule="evenodd"/>
|
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</g>
|
|
<text fill="#0000ff" xml:space="preserve" transform="matrix(1 0 0 1 504.81004 618.6)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="4.203 9.207001 14.211001 16.713002 21.717003 24.219004 29.223004 31.725005 36.729005 41.733007">14.3.3/334</tspan></text>
|
|
<g clip-path="url(#clip_76)">
|
|
<path transform="matrix(1,0,0,1,54,631.85)" d="M.25 .25H60.23V15.25H.25Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 56.25 634.1)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="4.977 9.981001 14.985002 19.989003 24.993004 29.997006 36.000009 41.00401 46.00801">4007_E003</tspan></text>
|
|
<g clip-path="url(#clip_77)">
|
|
<path transform="matrix(1,0,0,1,54,631.85)" d="M60.73 .25H307.19V15.25H60.73Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 116.729999 634.1)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 6.0030004 11.007001 17.505002 22.509003 25.506003 28.008004 35.505006 40.509008 45.51301 50.51701 53.01901 59.02201 61.52401 66.52801 69.03001 74.034008 78.534008 81.036 84.033008 89.037 94.041 96.039 100.539 103.041 108.045 111.042 113.544 116.541 122.544 130.041 136.539 141.543 147.546 155.043 161.046 166.545 172.548 178.047">Power Mode Status register (SMC_PMSTAT)</tspan></text>
|
|
<g clip-path="url(#clip_78)">
|
|
<path transform="matrix(1,0,0,1,53.999998,631.85)" d="M307.69 .25H347.51V15.25H307.69Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 363.69 634.1)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="15.408">8</tspan></text>
|
|
<g clip-path="url(#clip_79)">
|
|
<path transform="matrix(1,0,0,1,54,631.85)" d="M348.01 .25H387.83003V15.25H348.01Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 404.01 634.1)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="14.661">R</tspan></text>
|
|
<g clip-path="url(#clip_80)">
|
|
<path transform="matrix(1,0,0,1,54,631.85)" d="M388.33003 .25H448.31004V15.25H388.33003Z" fill="#ffffff" fill-rule="evenodd"/>
|
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</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 444.33003 634.1)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="17.982 22.986 27.990002 32.994005">011h</tspan></text>
|
|
<g clip-path="url(#clip_81)">
|
|
<path transform="matrix(1,0,0,1,54,631.85)" d="M448.81004 .25H503.75004V15.25H448.81004Z" fill="#ffffff" fill-rule="evenodd"/>
|
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</g>
|
|
<text fill="#0000ff" xml:space="preserve" transform="matrix(1 0 0 1 504.81004 634.1)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="4.203 9.207001 14.211001 16.713002 21.717003 24.219004 29.223004 31.725005 36.729005 41.733007">14.3.4/335</tspan></text>
|
|
<g clip-path="url(#clip_82)">
|
|
<path transform="matrix(1,0,0,1,54,547.1)" stroke-width="1" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M-.5 0H60.58"/>
|
|
</g>
|
|
<g clip-path="url(#clip_83)">
|
|
<path transform="matrix(1,0,0,1,54,547.1)" stroke-width="1" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M60.48-.5V38.5"/>
|
|
</g>
|
|
<g clip-path="url(#clip_84)">
|
|
<path transform="matrix(1,0,0,1,54,547.1)" stroke-width="1" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M61.08 38H-.5"/>
|
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</g>
|
|
<g clip-path="url(#clip_85)">
|
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<path transform="matrix(1,0,0,1,54,547.1)" stroke-width="1" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M0 38.5V-.5"/>
|
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</g>
|
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<g clip-path="url(#clip_86)">
|
|
<path transform="matrix(1,0,0,1,54,547.1)" stroke-width="1" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M60.38 0H307.54"/>
|
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</g>
|
|
<g clip-path="url(#clip_87)">
|
|
<path transform="matrix(1,0,0,1,54,547.1)" stroke-width="1" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M307.44-.5V38.5"/>
|
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</g>
|
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<g clip-path="url(#clip_88)">
|
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<path transform="matrix(1,0,0,1,54,547.1)" stroke-width="1" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M308.04 38H59.88"/>
|
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</g>
|
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<g clip-path="url(#clip_89)">
|
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<path transform="matrix(1,0,0,1,54,547.1)" stroke-width="1" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M307.34 0H347.86003"/>
|
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</g>
|
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<g clip-path="url(#clip_90)">
|
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<path transform="matrix(1,0,0,1,54,547.1)" stroke-width="1" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M347.76-.5V38.5"/>
|
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</g>
|
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<g clip-path="url(#clip_91)">
|
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<path transform="matrix(1,0,0,1,54,547.1)" stroke-width="1" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M348.36003 38H306.84"/>
|
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</g>
|
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<g clip-path="url(#clip_92)">
|
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<path transform="matrix(1,0,0,1,54,547.1)" stroke-width="1" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M347.66 0H388.18003"/>
|
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</g>
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<g clip-path="url(#clip_93)">
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<path transform="matrix(1,0,0,1,54,547.1)" stroke-width="1" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M388.08003-.5V38.5"/>
|
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</g>
|
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<g clip-path="url(#clip_94)">
|
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<path transform="matrix(1,0,0,1,54,547.1)" stroke-width="1" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M388.68003 38H347.16"/>
|
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</g>
|
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<g clip-path="url(#clip_95)">
|
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<path transform="matrix(1,0,0,1,54,547.1)" stroke-width="1" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M387.98 0H448.66004"/>
|
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</g>
|
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<g clip-path="url(#clip_96)">
|
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<path transform="matrix(1,0,0,1,54,547.1)" stroke-width="1" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M448.56004-.5V38.5"/>
|
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</g>
|
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<g clip-path="url(#clip_97)">
|
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<path transform="matrix(1,0,0,1,54,547.1)" stroke-width="1" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M449.16004 38H387.48"/>
|
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</g>
|
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<g clip-path="url(#clip_98)">
|
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<path transform="matrix(1,0,0,1,54,547.1)" stroke-width="1" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M448.46003 0H504.50004"/>
|
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</g>
|
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<g clip-path="url(#clip_99)">
|
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<path transform="matrix(1,0,0,1,54,547.1)" stroke-width="1" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M504.00004-.5V38.5"/>
|
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</g>
|
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<g clip-path="url(#clip_100)">
|
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<path transform="matrix(1,0,0,1,54,547.1)" stroke-width="1" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M504.50004 38H447.96003"/>
|
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</g>
|
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<g clip-path="url(#clip_101)">
|
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<path transform="matrix(1,0,0,1,54,585.1)" stroke-width=".5" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M60.48-.6V16.1"/>
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</g>
|
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<g clip-path="url(#clip_102)">
|
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<path transform="matrix(1,0,0,1,54,585.1)" stroke-width=".5" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M60.83 15.75H-.25"/>
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</g>
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<g clip-path="url(#clip_103)">
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<text xml:space="preserve" transform="matrix(1 0 0 1 54 18)" font-size="9" font-family="HelveticaLTStd" font-weight="bold"><tspan y="26.01034" x="351.468 357.96598 363.46498 368.46897 373.96797 376.96498 381.96897 385.46998 387.972 392.97599 397.97999 400.482 406.485 411.48899 416.49299 419.49 424.494 432.495 434.997 442.49403 447.993 453.492 458.496 460.99803 467.496 472.995 478.494 481.491 484.992 490.491 492.993 495.49504 500.49903">Chapter 14 System Mode Controller</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 54 734.93869)" font-size="10" font-family="HelveticaLTStd" font-weight="bold"><tspan y="8.59766" x="130.01 137.23 142.79 148.34999 151.12999 157.79999 163.90999 170.01999 173.34999 179.45999 185.01999 193.90999 196.68999 199.46999 205.02999 207.80998 215.02999 220.58998 223.91999 229.47998 233.36998 238.92998 245.03998 250.59998 256.15998 258.93998 267.26997 272.82997 278.93995 285.04994 290.60993 293.38993 296.16993 298.94993 306.16993 311.72993 317.28993 320.06993 322.8499 328.4099 331.1899 336.7499 342.8599 348.96989 351.74989 357.30989 362.86988 368.42988">K60 Sub-Family Reference Manual, Rev. 2 Jun 2012</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 54 751.756)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x=".00401 5.5030105 8.5000109 13.504011 18.50801 23.00801 27.50801 32.512014 34.510015 39.514017 42.016016 48.019014 53.023015 60.520017 62.518018 67.01802 72.02202 77.02602 82.030017 87.03401 91.53401 94.03601 99.04001 102.03701 104.53901 107.04101 109.54301 114.547008 119.047008">Freescale Semiconductor, Inc.</tspan></text>
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<text fill="#ff0000" xml:space="preserve" transform="matrix(1 0 0 1 220.32 751.756)" font-size="10" font-family="HelveticaLTStd" font-weight="bold"><tspan y="8.59766" x="58.45 65.12 69.01 74.57 77.35 80.13 89.02 91.799999 97.909999 103.46999 107.35999">Preliminary</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 391.68 751.756)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="151.308 156.312 161.316">331</tspan></text>
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<text fill="#ff0000" xml:space="preserve" transform="matrix(1 0 0 1 54 763.756)" font-size="10" font-family="HelveticaLTStd" font-weight="bold"><tspan y="8.59766" x="180.87 188.65 194.20999 200.31999 205.87999 209.76999 215.32999 218.10999 220.88999 228.10999 234.21999 239.77999 242.55998 248.66999 254.22998 259.78999 265.34999 268.12998 270.90998 277.01997 280.34996 286.45994 290.34996 299.23997 304.79997 308.12995 310.90995 317.01994">General Business Information</tspan></text>
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