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birdcage/docs/K60-refman-vectors/K60-reference-manual_page_203.svg
Ryan Malloy 5252d1d73c Add hardware reference docs (A3981, K60, RYS352A) 
Allegro A3981 stepper motor driver: datasheet, KiCad symbols/footprint,
3D model (TSSOP-28). Two per G2 board, SPI-controlled, AUTO microstep.

NXP MK60DN512VLQ10 (Kinetis K60): datasheet and 1300-page reference
manual. Cortex-M4 96MHz MCU running the G2 firmware.

Reyax RYS352A GPS module: datasheet and PAIR command guide.
GPS receiver on the G2 board (used for auto-location/satellite lookup).

All extracted as markdown + page images + vector SVGs for LLM context.
Binary assets (PDFs, PNGs, SVGs, STEP, WRL) stored via git-lfs.
2026-02-14 18:36:42 -07:00

130 lines
31 KiB (Stored with Git LFS)
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<text xml:space="preserve" transform="matrix(1 0 0 1 54 54)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x="0 8.340001 12.510002 20.850003 25.020003 33.360006 37.530008">6.2.2.5</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 114.04346 54)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x="0 12.495001 21.66 25.83 30.825 34.995004 44.160005 53.325006 59.160005 68.325008 77.490009 85.83001 94.17001 98.34001 106.680019 110.85001 120.015018 128.35501 136.695 140.865 150.03 158.37 167.53499 175.87499 181.70999 190.04999 195.04499 204.20998 210.04499 214.21498 218.38498 227.54998 235.88997 244.22997 249.22496 258.38996 263.38496 268.37995 276.71995 280.88996 290.05497 298.39497 306.73497 310.90498 315.89997 325.06498 336.735 347.56498">Multipurpose clock generator loss-of-clock (LOC)</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 54)" font-size="14" font-family="TimesLTStd"><tspan y="36.25" x="-.002 8.552 15.552 21.768002 25.268002 37.714006 47.052007 57.160009 60.660009 71.55201 78.55201 85.55201 92.55201 96.44401 102.66001 106.16001 111.60601 118.60601 125.60601 132.60602 139.60602 144.26802 148.16002 153.60602 157.10602 163.32202 170.32202 173.82202 180.03803 187.03803 190.93003 197.14603 201.80803 208.80803 215.02404 218.91603 222.41603 227.07804 233.29404 237.95604 244.17205 248.83405 255.05005 262.05006 268.26606 274.48207 277.98207 284.19807 288.09007 295.09007 301.30607 308.30607">The MCG module supports an external reference clock.</tspan><tspan y="60.65" x="-.00197 4.6600306 9.322031 12.822031 16.714032 23.714032 29.93003 33.43003 42.768033 49.768033 54.43003 63.768033 76.214038 84.768039 89.43004 92.93004 99.93004 103.82204 107.714038 111.214038 115.10603 122.10603 125.60603 129.49803 136.49803 142.71404 146.21404 158.66004 167.99803 178.10604 181.60604 192.49803 199.49803 206.49803 213.49803 217.39003 223.60604 227.10604 230.99803 236.44403 239.94403 245.39003 251.60604 255.49803 258.99806 262.49806 266.39006 273.39006 279.60606 283.10606 289.32206 293.21406 300.21406 306.43006 313.43006 316.93006 327.82206 334.82206 341.82206 345.71406 349.60606 356.60606 361.26805 364.76805 368.66004 374.10606 377.60606 383.82206 390.82206 397.03807 404.03807 407.93006 414.14607 421.14607 424.64607 428.14607 432.80805 437.47004 440.97004 444.86204 451.86204">If the C6[CME] bit in the MCG module is set, the clock monitor is enabled. If the</tspan><tspan y="76.65" x="-.002 6.2140009 13.214001 17.106 23.322003 27.984004 34.984 41.2 45.092004 48.592004 53.254 59.47 64.132 70.34801 75.01001 81.22601 88.22601 94.44202 100.65802 104.15802 108.82002 115.036029 118.928028 122.82002 128.26602 131.76602 138.76602 144.98203 148.87403 155.87403 165.98203 169.48203">external reference falls below f</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 54)" font-size="10.5" font-family="TimesLTStd"><tspan y="79.450008" x="174.144 177.063 182.313 186.975 192.225 195.14402 200.39402">loc_low</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 54)" font-size="14" font-family="TimesLTStd"><tspan y="76.65" x="207.97499 211.47499 218.47499 223.137 226.637"> or f</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 54)" font-size="10.5" font-family="TimesLTStd"><tspan y="79.450008" x="231.299 234.218 239.468 244.13 249.38 254.63 257.549 262.799">loc_high</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 54)" font-size="14" font-family="TimesLTStd"><tspan y="76.65" x="268.049 271.549 275.049 281.265 286.71104 290.21104 296.42704 303.42704 310.42704 314.31904 318.98103 325.98103 329.87303 333.765 339.98103 346.98103 350.48103 357.48103 364.48103 367.98103 371.87303 378.87303 385.08903 388.58903 397.92704 404.92704 409.58903 418.92704 429.03504 439.14305 449.25105 457.80503 462.467 465.967 470.629 474.521 480.737 484.629">, as controlled by the C2[RANGE] field</tspan><tspan y="92.65" x=".0050354006 3.8970359 10.897036 14.397036 18.289036 25.289036 31.505036 35.005037 47.451036 56.789037 66.89703 70.39703 81.28903 88.28903 95.28903 102.28903 106.18103 112.39703 115.89703 119.39703 123.28903 130.28903 136.50504 140.00504 152.45104 161.78903 171.89704 175.39704 180.05904 186.27504 191.72104 197.93704 201.82904 207.27504 210.77504 214.27504 222.82904 229.82904 236.04505 239.54505 248.88304 258.22105 270.66706 273.18705 278.63307 282.13307 289.91706 299.25508 307.03907 314.03907 318.70106 327.25505 337.36305 346.70106 351.36305 354.86305 361.86305 365.75505 369.64704 373.14704 377.03904 382.48506 385.98506 391.43107 397.64707 401.53907 405.03907 408.93107 415.93107 419.43107 423.32307 430.32307 437.32307 441.21507 447.43107 453.64707 457.53907 463.75508 467.25508 471.14707 478.14707 482.03907">in the MCG module, the MCU resets. The RCM's SRS0[LOC] bit is set to indicate this</tspan><tspan y="108.65" x=".0050854005 4.6670858 10.883086 16.329087 22.545086 26.437087 29.937087 35.383089 42.383089 49.383089 54.045087 60.261087 66.47709">reset source.</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 54)" font-size="14" font-family="HelveticaLTStd" font-weight="bold"><tspan y="132.83673" x="232.55908 242.66709 253.55908 262.11308">NOTE</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 54)" font-size="14" font-family="TimesLTStd"><tspan y="149.05002" x="71.99307 80.54707 87.54707 91.04707 98.04707 102.709079 108.92508 115.92508 122.14108 129.14109 133.03308 136.53308 143.53308 150.53308 156.74909 163.74909 170.74909 176.96509 183.18109 187.07309 193.2891 200.2891 203.7891 207.68109 214.68109 220.12709 225.57309 229.07309 236.07309 240.73509 244.23509 250.4511 254.3431 261.34309 267.55909 274.55909 278.05909 282.72108 288.93708 294.3831 300.5991 304.4911 307.9911 314.2071 321.2071 327.4231 334.4231 338.3151 343.7611 347.2611 350.7611 356.9771 360.8691 364.7611 368.2611 374.4771 378.3691 385.3691 391.5851">To prevent unexpected loss of clock reset events, all clock</tspan><tspan y="165.05002" x="71.99307 82.88507 89.88507 96.88507 100.77707 104.66907 111.66907 116.33107 121.77707 125.27707 130.72307 137.72307 144.72307 151.72307 155.61507 162.61507 166.11507 173.11507 179.33107 182.83107 189.83107 193.72307 199.16907 205.38507 212.38507 216.27707 222.49308 229.49308 232.99308 239.99308 246.20908 250.87108 257.8711 262.53309 268.74909 272.24909 278.4651 285.4651 289.3571 295.5731 300.23509 304.12709 311.12709 318.12709 321.62709 327.84309 334.84309 341.84309 345.34309 349.23509 356.23509 366.34309 369.84309 376.84309 383.84309 393.95109 400.16709">monitors should be disabled before entering any low power</tspan><tspan y="181.05002" x="71.99307 82.88507 89.88507 96.88507 103.101078 108.54707 112.04707 115.54707 119.43907 126.43907 132.65508 136.54708 143.54708 150.54708 154.43907 161.43907 168.43907 171.93907 182.04708 190.60108 198.38507 207.72307 211.22307 217.43907 224.43907 231.43907 234.93907 245.04708 253.60108 261.38508 274.60108">modes, including VLPR and VLPW.</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 275.6)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x=".00105 8.341051 12.511051 20.851052 25.021052 33.361055 37.531057">6.2.2.6</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 114.04346 275.6)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x=".00105 12.496051 23.326052 34.99605 39.166055 43.336057 52.501058 60.841058 69.18106 74.17606 83.341068 88.33607 93.33107 97.50107 106.66607 115.00607 123.34608 127.516078 132.51108 141.67607 153.34607 162.51107 167.50606 171.67606 177.51107 185.85106 194.19106 202.53105">MCG loss-of-lock (LOL) reset</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 54)" font-size="14" font-family="TimesLTStd"><tspan y="257.85" x=".00405 8.55805 15.55805 21.774052 25.274052 37.720056 47.058057 57.166059 60.666059 64.55806 71.55806 77.77406 81.66606 88.66606 95.66606 101.882068 107.328067 110.828067 117.04407 120.54407 128.32807 136.88207 145.43607 148.93607 152.82807 159.82807 165.27407 170.72006 175.38207 182.38207 187.04407 191.70607 195.59807 202.59807 208.81407 215.81407 219.31407 226.31407 232.53008 236.42208 242.63808 248.85408 252.74608 259.7461 264.40809 267.90809 271.40809 279.96208 286.96208 293.17808 296.67808 303.67808 309.89408 313.78608 320.00209 326.21809 330.11009 337.11009 341.77207 345.27207 349.16407 354.61009 358.11009 364.32609 371.32609 377.54209 384.54209 388.43409 394.6501 401.6501 405.1501 415.2581 422.2581 428.4741 435.4741 438.9741 445.1901 452.1901 459.1901 463.85209 467.74409 474.74409 481.74409 486.40608 492.62208">The MCG includes a PLL loss-of-lock detector. The detector is enabled when configured</tspan><tspan y="273.85" x=".0041 4.6661 11.6661 16.3281 19.8281 27.6121 36.1661 44.7201 48.2201 54.4361 61.4361 68.4361 71.9361 75.828098 82.828098 89.0441 96.0441 99.5441 106.5441 112.7601 118.2061 121.7061 128.7061 134.9221 141.1381 148.1381 151.6381 157.85411 164.07012 171.07012 174.96212 181.17812 188.17812 194.39412 201.39412 204.89412 208.39412 213.05612 217.71813 221.21813 225.11013 232.11013 238.32613 241.82613 254.27213 263.61015 273.71815 280.71815 290.05616 297.05616 301.71815 310.27214 320.38014 328.9341 338.27214 346.8261 351.4881 354.9881 361.9881 365.8801 369.7721 373.2721 377.1641 384.1641 387.6641 391.5561 398.5561 404.7721 408.2721 420.7181 430.05613 440.16413 443.66413 454.55613 461.55613 468.55613 475.55613 479.44813 485.66413 489.16413 493.05613">for PEE and lock has been achieved. If the MCG_C8[LOLRE] bit in the MCG module is</tspan><tspan y="289.85" x=".0041 5.4501006 11.666101 15.558102 19.058102 25.274102 32.2741 39.2741 42.7741 46.666105 53.666105 59.882104 63.382104 71.16611 79.72011 88.27411 91.77411 95.66611 102.66611 108.88211 115.88211 119.38211 124.82811 128.72011 134.93611 138.82811 145.82811 151.27411 154.77411 161.77411 165.6661 169.5581 173.0581 177.72011 190.1661 199.5041 209.6121 216.6121 224.3961 229.0581 237.6121 247.72011 256.2741 264.0581 271.0581 275.7201 280.38209 283.88209 290.88209 297.09809 303.3141 310.3141 321.2061 327.4221 332.8681 336.3681 341.81413 348.03013 351.92213 355.42213 358.92213 362.81413 369.81413 376.03013 379.53013 391.97615 401.31416 411.42216 414.92216 419.58415 425.80015 431.24617 437.46217 441.35417 446.80018 450.30018 453.80018 462.35417 469.35417">set and the PLL lock status bit (MCG_S[LOLS0]) becomes set, the MCU resets. The</tspan><tspan y="305.85" x=".0041 9.342101 18.680104 31.126105 38.126108 45.910108 55.248109 63.03211 70.032108 74.69411 83.24811 93.35611 101.91011 106.57211 110.07211 117.07211 120.96411 124.85611 128.35611 132.24811 137.6941 141.1941 146.6401 152.85611 156.74811 160.24811 164.1401 171.1401 174.6401 178.5321 185.5321 192.5321 196.4241 202.6401 208.85611 212.74811 218.96411 222.46411 226.35611 233.35611 237.24811 242.6941 246.1941 250.85611 257.0721 262.51814 268.73414 272.62614 276.12614 281.57215 288.57215 295.57215 300.23414 306.45014 312.66615">RCM_SRS0[LOL] bit is set to indicate this reset source.</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 54)" font-size="14" font-family="HelveticaLTStd" font-weight="bold"><tspan y="330.0367" x="232.55808 242.66608 253.55808 262.11207">NOTE</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 54)" font-size="14" font-family="TimesLTStd"><tspan y="346.25" x="72.00607 80.560077 87.560077 91.45207 96.89807 100.39807 105.060077 111.27608 116.72208 122.93808 126.83008 130.33008 135.77608 142.77608 149.77608 154.43808 160.65409 166.87009 170.37009 177.37009 184.37009 190.58609 196.03209 199.53209 206.53209 213.53209 217.42409 220.92409 227.14009 233.3561 240.3561 245.8021 252.0181 255.5181 261.7341 265.2341 269.8961 276.1121 281.5581 287.7741 291.6661 295.1661 299.0581 303.7201 307.2201 311.1121 318.1121 324.3281 327.8281 334.0441 341.0441 344.9361 351.9361 355.4361 359.3281 364.7741 368.2741 372.1661 379.1661 382.6661 388.8821 395.8821 402.8821 406.3821 411.82814 415.72013 422.72013">This reset source does not cause a reset if the chip is in any stop</tspan><tspan y="362.25" x="72.00607 82.89807 89.89807 96.89807 103.114078">mode.</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 456.8)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x="-.00594 8.334061 12.504061 20.844063 25.014063 33.354066 37.524068">6.2.2.7</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 114.04346 456.8)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x="-.00594 9.999061 14.9940609 24.159062 33.324064 37.494066 50.829065 59.994066 69.159069 77.49907 81.66907 90.00907 98.349079 106.68908 115.85408 125.01908 136.68909 140.85909 149.19908 158.36408 167.52907 175.86907 180.03907 188.37906 194.21407 200.04907 209.21407 215.04907 219.21907 224.21407 234.21907 245.04907 255.87908 266.70909 276.71409 287.54408 298.37406">Stop mode acknowledge error (SACKERR)</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 54)" font-size="14" font-family="TimesLTStd"><tspan y="439.05" x=".00306 8.55706 15.55706 19.44906 24.895062 28.395062 33.05706 39.27306 44.71906 50.93506 54.82706 58.32706 62.219064 67.66506 71.16506 78.16506 84.381069 91.381069 97.59707 102.25907 108.475078 112.36707 118.58308 125.58308 129.08307 132.97507 137.63707 141.13707 145.02907 152.02907 158.24507 161.74507 167.96108 174.96108 179.62308 185.83908 189.33908 195.55509 199.44709 203.33908 209.55509 220.44709 227.44709 231.33908 236.78508 240.28508 244.17708 251.17708 254.67708 260.89308 267.89308 271.78507 278.00108 282.66307 286.16307 291.60908 295.50108 302.50108 309.50108 313.00108 323.89308 330.89308 337.89308 344.10908 347.60908 351.10908 358.10908 365.10908 369.00108 372.50108 379.50108 386.50108 390.39308 393.89308 400.10908 404.00108 407.89308 411.39308 422.28507 429.28507 436.28507 443.28507 447.17707 453.39308">This reset is generated if the core attempts to enter stop mode, but not all modules</tspan><tspan y="455.05" x=".00306 6.2190606 12.4350609 19.43506 26.43506 33.43506 43.54306 47.435064 53.651063 60.651063 67.65106 73.867069 77.367069 82.813068 86.70506 93.70506 100.70506 104.20506 115.09706 122.09706 129.09706 135.31307 138.81307 148.92107 152.81307 156.70507 163.70507 167.59706 174.59706 178.09706 185.09706 192.09706 199.09706 206.09706 209.59706 215.81307 222.81307 229.02907 232.92107 239.13707 244.58307 248.08307 255.08307 259.74507 263.24507 267.13706 274.13706 280.35307 283.85307 290.85307 294.35307 301.35307 311.46107 317.67707 321.17707 329.73106 337.51506 347.62306 351.12306 357.33906 361.23106 368.23106 374.44706 381.44706">acknowledge stop mode within 1025 cycles of the 1 kHz LPO clock.</tspan><tspan y="479.44999" x=".00306 10.111061 13.611061 24.503064 31.503064 38.503065 45.503065 49.395067 55.611066 59.111066 70.00307 73.895069 80.895069 87.895069 91.78706 95.28706 102.28706 109.28706 113.17906 116.67906 122.895069 129.11107 136.11107 143.11107 150.11107 160.21907 164.11107 170.32707 177.32707 184.32707 190.54308 194.04308 197.93508 204.93508 211.15108 214.65108 220.86708 227.86708 231.75908 236.42108 243.42108 246.92108 250.81308 257.81309 261.31309 266.7591 270.6511 277.6511 284.6511 288.1511 299.0431 306.0431 313.0431 319.2591 322.7591 326.6511 331.31309 334.81309 341.02909 348.02909 351.52909 357.7451 362.40708 367.06907 374.06907 378.73106 382.23106 388.44706 395.44706 402.44706 409.44706 413.33906 417.23106 421.12306 428.12306 435.12306 438.62306 445.62306 451.83906 458.05506 465.05506 469.71705 475.16307 478.66307 482.16307 490.71705 497.71705">A module might not acknowledge the entry to stop mode if an error condition occurs. The</tspan><tspan y="495.44999" x=".00306 6.2190606 10.881061 15.54306 22.54306 27.205061 30.705061 36.921064 43.137063 50.137063 53.637063 60.637063 66.853069 70.353069 76.56907 82.78507 89.78507 95.23107 101.447078 108.447078 111.947078 118.947078 125.947078 129.44709 135.66309 139.16309 143.82509 150.04109 153.93309 157.82509 164.82509 169.48709 175.7031 179.2031 186.2031 190.8651 194.3651 200.5811 207.5811 211.0811 217.2971 224.2971 228.1891 234.4051 239.06711 246.06711 252.28311 256.1751 259.6751 265.8911 269.7831 276.7831 282.9991 289.9991 293.4991 297.3911 304.3911 311.3911 318.3911 322.2831 325.7831 329.6751 336.6751 340.1751 346.3911 349.8911 360.7831 367.7831 374.7831 381.7831 385.6751 391.8911">error can be caused by a failure of an external clock input to a module.</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 590)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x=".00604 8.346041 12.516041 20.856041 25.026041 33.366044 37.536046">6.2.2.8</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 114.04346 590)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x=".00603 10.011031 19.176032 24.171032 29.16603 40.836034 49.176034 55.011034 63.351034 67.521038 73.35603 81.69604 90.03604 98.376049 103.37105 107.541049 112.53605 122.541049 136.70105">Software reset (SW)</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 54)" font-size="14" font-family="TimesLTStd"><tspan y="572.25" x=".00204 8.55604 15.55604 21.772042 25.272042 33.05604 43.164045 50.948045 60.286046 68.84004 76.62405 85.17805 93.73205 103.07005 111.624057 121.732059 125.232059 132.23206 136.12406 140.01605 143.51605 147.40805 154.40805 157.90805 161.80005 168.80005 175.01605 178.51605 188.62406 198.73206 203.39406 212.73206 216.23206 222.44806 229.44806 236.44806 240.34006 244.23206 250.44806 256.66407 260.55607 264.44807 271.44807 278.44807 281.94807 285.84007 292.84007 296.73207 302.94807 307.61006 312.27204 319.27204 326.27204 330.16404 333.66404 339.88005 346.88005 353.88005 357.38005 362.04203 368.25804 373.70405 379.92005 383.81205 387.31205 393.52806 400.52806 407.52806 411.42005 416.08204 423.08204 426.97404 430.47404 435.13603 441.35203 448.35203 452.24403 457.69004 461.58204 467.79804 472.46003 475.96003 482.17604 488.39204">The SYSRESETREQ bit in the NVIC application interrupt and reset control register can</tspan><tspan y="588.25" x=".00208 7.00208 13.2180809 16.71808 22.164082 28.380082 32.272085 35.772085 39.664087 46.664087 50.164087 54.826086 61.826086 66.48808 72.70409 78.92009 82.42009 88.63609 92.13609 97.58209 104.58209 109.244098 113.13609 123.244098 129.4601 134.1221 140.3381 143.8381 148.5001 154.71611 160.16211 166.37812 170.27011 173.77011 180.77011 187.77011 191.27011 195.16211 202.16211 208.37812 211.87812 218.87812 225.09412 232.09412 235.98612 242.20212 248.41812 251.91812 255.41812 260.0801 267.8641 274.0801 280.2961 283.7961 293.9041 303.24214 315.68815 318.20814 323.65415 327.15415 337.26216 347.37016 352.03215 361.37016 364.87016 371.87016 378.87016 385.08616 392.08616 402.97816 409.19416 416.19416 420.08616 426.30216 430.19416 434.08616 441.08616 448.08616 451.58616 456.24815 463.24815 467.91014 471.41014 475.30213 482.30213">be set to force a software reset on the device. (See ARM's NVIC documentation for the</tspan><tspan y="604.25" x=".00208 4.66408 11.66408 15.55608 19.44808 22.94808 29.94808 36.16408 41.61008 47.82608 52.48808 56.38008 63.38008 67.27208 71.16408 78.16408 85.16408 88.66408 95.66408 100.32608 103.82608 107.71808 114.71808 120.93408 124.43408 129.09609 135.31209 142.31209 146.20409 151.65009 155.54209 161.75809 166.42009 169.92009 174.58209 178.47409 184.6901 188.58209 195.58209 201.02809 204.52809 208.02809 214.2441 219.6901 226.6901 232.9061 239.1221 243.0141 249.2301 253.1221 257.0141 264.0141 267.5141 271.4061 278.4061 284.6221 288.1221 298.2301 306.7841 316.1221 324.6761 334.7841 343.33808 353.44609 356.94609 361.60807 365.50007 371.71607 375.60807 382.60807 386.10807 390.77006 396.98606 403.98606 410.98606 414.87806 419.54005 425.75605 436.64805 442.86405 449.86405 453.75605 459.20207 462.70207">full description of the register fields, especially the VECTKEY field requirements.)</tspan><tspan y="620.25" x=".00208 7.786081 14.002081 17.894082 21.786082 25.678082 32.67808 39.67808 43.17808 50.962083 61.070085 68.85409 78.19209 86.74609 94.5301 103.0841 111.6381 120.976108 129.5301 139.6381 143.1381 150.1381 156.35411 163.35411 169.57012 174.23212 180.44812 184.34012 190.55612 196.00212 199.50212 205.71813 209.21813 214.66413 221.66413 226.32613 230.21813 240.32613 246.54213 251.20413 257.42015 260.92015 265.58213 271.79814 277.24415 283.46015 287.35215 290.85215 295.51414 301.73014 308.73014 315.73014 321.94615 327.39216 331.28416 334.78416 338.28416 346.83815 353.83815 357.73014 363.17616 366.67616 371.33815 377.55415 383.00016 389.21617 393.10816 396.60816 401.27015 408.27015 412.93214 419.14814 425.36415 430.81016 434.31016 440.52616 444.02616 449.47218 456.47218 461.91819 465.81019 472.02619">Setting SYSRESETREQ generates a software reset request. This reset forces a system</tspan><tspan y="636.25" x=".00208 4.66408 10.880081 16.326083 22.542084 26.434084 29.934084 36.934083 41.59608 45.09608 51.31208 55.204084 59.096086 62.596086 73.48808 79.70409 83.596088 90.596088 95.25809 98.75809 104.97409 111.97409 122.86609 129.86609 136.86609 143.86609 150.08209 157.08209 160.97409 166.42009 169.92009 176.1361 183.1361 189.3521 195.5681 202.5681 206.4601 209.9601 214.6221 221.6221 226.2841 229.7841 233.6761 240.6761 246.8921 250.3921 257.3921 263.6081 270.6081 277.6081 284.6081 288.1081 299.0001 306.0001 313.0001 320.0001 323.8921 330.1081 333.6081 337.1081 347.2161 350.7161 356.1621 363.1621 367.8241 371.7161 381.8241 388.0401 392.7021 398.9181 402.4181 407.08009 413.29609 418.7421 424.9581 428.8501 432.3501 438.5661 444.7821 451.7821 457.22813 463.44413 468.89015 472.39015 476.28215 483.28215">reset of all major components except for the debug module. A software reset causes the</tspan><tspan y="652.25" x=".00208 9.340081 18.678082 31.124083 33.64408 39.09008 42.59008 50.37408 59.712083 67.496089 74.496089 79.15809 86.94209 100.1581 104.8201 108.3201 115.3201 119.2121 123.104099 126.604099 130.4961 137.4961 140.9961 146.4421 152.6581 156.5501">RCM's SRS1[SW] bit to set.</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 18)" font-size="9" font-family="HelveticaLTStd" font-weight="bold"><tspan y="26.01031" x="393.98399 400.48197 405.98097 410.98497 416.48396 419.48097 424.48497 427.98597 430.48799 435.49198 437.994 444.49198 449.49598 454.49998 459.50398 462.50099 465.003 470.007 475.50599 481.00498 483.507 490.00498 495.50398 501.00297">Chapter 6 Reset and Boot</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 734.93869)" font-size="10" font-family="HelveticaLTStd" font-weight="bold"><tspan y="8.59766" x="130.00998 137.22998 142.78998 148.34998 151.12998 157.79998 163.90998 170.01998 173.34998 179.45998 185.01998 193.90998 196.68997 199.46997 205.02997 207.80997 215.02997 220.58997 223.91997 229.47997 233.36997 238.92996 245.03997 250.59996 256.15998 258.93998 267.26997 272.82997 278.93995 285.04994 290.60993 293.38993 296.16993 298.94993 306.16993 311.72993 317.28993 320.06993 322.8499 328.4099 331.1899 336.7499 342.8599 348.96989 351.74989 357.30989 362.86988 368.42988">K60 Sub-Family Reference Manual, Rev. 2 Jun 2012</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 751.756)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x=".00401 5.5030105 8.5000109 13.504011 18.50801 23.00801 27.50801 32.512014 34.510015 39.514017 42.016016 48.019014 53.023015 60.520017 62.518018 67.01802 72.02202 77.02602 82.030017 87.03401 91.53401 94.03601 99.04001 102.03701 104.53901 107.04101 109.54301 114.547008 119.047008">Freescale Semiconductor, Inc.</tspan></text>
<text fill="#ff0000" xml:space="preserve" transform="matrix(1 0 0 1 220.32 751.756)" font-size="10" font-family="HelveticaLTStd" font-weight="bold"><tspan y="8.59766" x="58.45 65.12 69.01 74.57 77.35 80.13 89.02 91.799999 97.909999 103.46999 107.35999">Preliminary</tspan></text>
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<text fill="#ff0000" xml:space="preserve" transform="matrix(1 0 0 1 54 763.756)" font-size="10" font-family="HelveticaLTStd" font-weight="bold"><tspan y="8.59766" x="180.87 188.65 194.20999 200.31999 205.87999 209.76999 215.32999 218.10999 220.88999 228.10999 234.21999 239.77999 242.55998 248.66999 254.22998 259.78999 265.34999 268.12998 270.90998 277.01997 280.34996 286.45994 290.34996 299.23997 304.79997 308.12995 310.90995 317.01994">General Business Information</tspan></text>
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