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birdcage/docs/K60-refman-vectors/K60-reference-manual_page_187.svg
Ryan Malloy 5252d1d73c Add hardware reference docs (A3981, K60, RYS352A) 
Allegro A3981 stepper motor driver: datasheet, KiCad symbols/footprint,
3D model (TSSOP-28). Two per G2 board, SPI-controlled, AUTO microstep.

NXP MK60DN512VLQ10 (Kinetis K60): datasheet and 1300-page reference
manual. Cortex-M4 96MHz MCU running the G2 firmware.

Reyax RYS352A GPS module: datasheet and PAIR command guide.
GPS receiver on the G2 board (used for auto-location/satellite lookup).

All extracted as markdown + page images + vector SVGs for LLM context.
Binary assets (PDFs, PNGs, SVGs, STEP, WRL) stored via git-lfs.
2026-02-14 18:36:42 -07:00

654 lines
56 KiB (Stored with Git LFS)
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<text xml:space="preserve" transform="matrix(1 0 0 1 459.7 76)" font-size="9" font-family="HelveticaLTStd" font-weight="bold"><tspan y="7.83789" x="1.998 8.496 10.998001 16.497002 21.501004 26.505005 29.007006 31.509007 36.51301 39.015008 44.514009 47.016008 52.020009 57.02401 62.52301 65.02501 70.02901">Clock is disabled</tspan><tspan y="18.83789" x="1.998 9 14.499001 19.503003 25.002003">when&#x2026;</tspan></text>
<g clip-path="url(#clip_6)">
<path transform="matrix(1,0,0,1,54,105.9)" d="M.25 .5H100.55V75.7H.25Z" fill="#ffffff" fill-rule="evenodd"/>
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<text fill="#0000ff" xml:space="preserve" transform="matrix(1 0 0 1 56.25 108.4)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="8.379 14.382 16.884 21.888 26.892003 29.889002 34.893 39.897005 42.399003 44.901 47.403 53.406 59.408998 65.411998 67.913997 72.91799 77.92199 82.92599">Ethernet IEEE 1588</tspan><tspan y="18.83789" x="37.899003 42.399003 44.397005 49.401006 53.901006">clock</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 157.05 108.4)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 6.4980008 11.502001 14.004002 16.506003 21.510003 24.012003 29.016003 34.020006 39.024007 41.526006 49.023008 55.521009">Up to 100 MHz</tspan></text>
<g clip-path="url(#clip_8)">
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<text xml:space="preserve" transform="matrix(1 0 0 1 257.85 108.4)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 6.4980008 9.000001">N/A</tspan></text>
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</g>
<text xml:space="preserve" transform="matrix(1 0 0 1 358.65003 108.4)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 6.0030004 10.503 15.003 17.505002 22.509003 30.006005 32.508005 37.008005 39.006006 44.010007 48.510007 53.010007">System clock,</tspan><tspan y="24.23789" x="0 7.0020005 13.005001 19.503003 25.506003 32.004 38.502004 43.506006 49.509004">OSCERCLK,</tspan><tspan y="40.63789" x="0 7.4970009 13.995001 20.997002 27.000002 32.004 37.008005 43.506006 48.510007 54.51301">MCGPLLCLK/</tspan><tspan y="51.63789" x="0 7.4970009 13.995001 20.997002 26.496003 31.500004 36.504007 43.002008 48.00601 54.00901 56.51101 59.01301 64.017009">MCGFLLCLK, or</tspan><tspan y="68.03789" x="0 6.0030004 12.501001 18.504002 24.003003 29.007004 34.011007 39.015008 44.01901 49.02301 54.02701 60.525014 65.529018 71.53201 74.03401">ENET_1588_CLKIN</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 459.45 108.4)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 6.0030004 8.505001 13.509002 18.513003 21.510003 26.514004 31.518006 34.020006 36.522005 38.520006 43.020006 45.522005 50.526006 52.524007 57.024007 62.028009 67.032009 69.03001 74.034008">Ethernet is disabled</tspan></text>
<g clip-path="url(#clip_11)">
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</g>
<text fill="#0000ff" xml:space="preserve" transform="matrix(1 0 0 1 56.25 184.1)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="21.402 26.901001 33.399003 39.402 45.9 51.903 54.405 58.905 60.903 65.907 70.407">TRACE clock</tspan></text>
<g clip-path="url(#clip_12)">
<path transform="matrix(1,0,0,1,54,181.85)" d="M101.05 .25H201.35V31.65H101.05Z" fill="#ffffff" fill-rule="evenodd"/>
</g>
<text xml:space="preserve" transform="matrix(1 0 0 1 157.05 184.1)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 6.4980008 11.502001 14.004002 16.506003 21.510003 24.012003 29.016003 34.020006 39.024007 41.526006 49.023008 55.521009">Up to 100 MHz</tspan></text>
<g clip-path="url(#clip_13)">
<path transform="matrix(1,0,0,1,54,181.85)" d="M201.85 .25H302.15003V31.65H201.85Z" fill="#ffffff" fill-rule="evenodd"/>
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<text xml:space="preserve" transform="matrix(1 0 0 1 257.85 184.1)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 6.4980008 11.502001 14.004002 16.506003 21.510003 24.012003 29.016003 31.518004 39.015005 45.513006">Up to 4 MHz</tspan></text>
<g clip-path="url(#clip_14)">
<path transform="matrix(1,0,0,1,54,181.85)" d="M302.65003 .25H402.95V31.65H302.65003Z" fill="#ffffff" fill-rule="evenodd"/>
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<text xml:space="preserve" transform="matrix(1 0 0 1 358.65003 184.1)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 6.0030004 10.503 15.003 17.505002 22.509003 30.006005 32.508005 37.008005 39.006006 44.010007 48.510007 53.010007 55.512006 60.516008">System clock or</tspan><tspan y="24.23789" x="0 7.4970009 13.995001 20.997002 27.999003 34.497 39.996004 46.494005 51.498006">MCGOUTCLK</tspan></text>
<g clip-path="url(#clip_15)">
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<text xml:space="preserve" transform="matrix(1 0 0 1 459.45 184.1)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 5.499 8.496 13.500001 18 23.004002 25.506003 27.504002 32.004 34.506 39.510004 41.508005 46.008005 51.012006 56.016008 58.014009 63.01801">Trace is disabled</tspan></text>
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<path transform="matrix(1,0,0,1,54,181.85)" stroke-width=".5" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M504.25 31.9H403.1"/>
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<text xml:space="preserve" transform="matrix(1 0 0 1 54 274.8)" font-size="17" font-family="HelveticaLTStd" font-weight="bold"><tspan y="12.91602" x="0 9.452001 14.178001">5.5</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 91.80322 274.8)" font-size="17" font-family="HelveticaLTStd" font-weight="bold"><tspan y="12.91602" x="0 4.7260005 15.113001 20.774003 30.226002 36.839 47.226 56.678 61.404005 66.130008 75.58201 80.30801 90.69501 100.14701 109.599018 114.32501 124.71201 135.09902 139.82501 146.43802 155.89002 166.27701 176.664 181.39 188.003 197.455 212.56801 222.02 232.407 238.068">Internal clocking requirements</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54.000005 53.999986)" font-size="14" font-family="TimesLTStd"><tspan y="258.05" x="0 8.554 15.554 21.77 25.27 31.486 35.378004 42.378004 48.594 55.594 59.094 66.094 69.986 76.986 80.878 87.878 94.094 98.756008 104.202 107.702 113.91801 118.58001 124.79601 128.29602 135.29602 139.95803 146.95803 153.95803 158.62003 164.83603 175.72803 186.62003 192.83603 199.83603 203.33603 210.33603 214.22803 220.44403 223.94403 227.83603 234.83603 241.05204 244.55204 252.33603 256.99803 269.44404 272.94404 283.83604 290.83604 297.83604 304.83604 308.72804 314.94404 319.60603 325.05204 328.55204 337.89006 346.44404 356.55204 366.66004 371.32203 381.43003 384.93003 389.592 395.808 402.808 406.7 412.14604 416.03804 422.25404 426.91603 432.36204 435.86204 439.36204 447.91603 454.13203 460.34803">The clock dividers are programmed via the SIM module&#x2019;s CLKDIV registers. Each</tspan><tspan y="274.05003" x="0 7 10.892 17.892 21.784 28.784 35 39.662 43.162 47.054 52.5 56 63 67.662 74.662 81.662 86.324008 92.54001 103.43201 114.324008 120.54001 127.54001 131.432 137.64801 141.14801 145.81002 150.47202 157.47202 168.36402 171.86402 178.08002 181.58002 188.58002 192.47202 199.47202 203.36402 210.36402 216.58002 221.24202 228.24202 235.24202 239.90402 246.90402 250.40402 254.29602 261.29603 265.958 272.958 279.958 286.958 293.958 297.458 304.458 308.35 315.35 319.242 326.242 332.458 337.12 344.12 351.12 355.78199 362.78199 369.78199 373.28199 378.728 384.944 388.836 392.728 396.62 403.62 410.62 414.12 417.62 426.17399 433.17399 439.38999 442.88999 447.55198 454.55198 458.44398 462.33598 469.33598 479.44398 483.33598 490.33598">divider is programmable from a divide-by-1 through divide-by-16 setting. The following</tspan><tspan y="290.05003" x="0 4.662 10.878 17.878 24.878 28.77 33.432 39.648 50.54 56.756 63.756 67.648 73.094 76.594 87.486 94.486 99.932 103.824 107.324 114.324 120.54 124.04 134.932 141.14801 145.04001 148.54001 158.64801 165.64801 171.86402 178.86402 182.36402 188.58002 195.58002 202.58002 207.24202 211.13402 218.13402 225.13402 229.79602 233.68802 240.68802 247.68802 251.18802 255.08002 262.08003 268.29603 271.79603 278.01203 281.90403 288.90403 295.12004 302.12004 307.56605 311.06605 315.72804 322.72804 327.39 330.89 334.782 341.782 345.674 351.12004 354.62004 361.62004 367.83604 374.83604 378.72804 384.94404 391.16004">requirements must be met when configuring the clocks for this device:</tspan><tspan y="314.45" x="7.50402 14.504021 23.996022 32.550024 39.550024 45.76602 49.26602 55.48202 62.48202 67.14402 73.36002 76.86002 83.07603 90.07603 97.07603 100.57603 106.022029 113.022029 118.468029 122.36002 128.57602 139.46802 142.96802 149.18402 153.07602 160.07602 166.29203 173.29203 176.79203 181.45403 186.11603 192.33203 199.33203 206.33203 212.54804 219.54804 225.76404 229.65604 235.87204 241.31804 244.81804 255.71004 262.71003 268.15605 272.04804 275.54804 282.54804 288.76405 292.26405 299.26405 306.26405 313.26405 316.76405 329.21006 339.31806 345.53407 349.03407 356.03407 360.69606 364.19606 369.64207 373.53407 380.53407 390.64207 396.85807 401.52006">1.The core and system clock frequencies must be 100 MHz or slower.</tspan><tspan y="330.45" x="7.50402 14.504021 23.996022 32.550024 39.550024 45.76602 49.26602 56.26602 63.26602 68.71202 72.21202 78.428028 82.32002 89.32002 95.536029 102.536029 106.036029 110.69803 115.36003 121.576038 128.57604 135.57604 141.79204 148.79204 155.00804 162.00804 165.50804 176.40004 183.40004 188.84604 192.73804 196.23804 203.23804 209.45404 212.95404 219.95404 224.61605 231.61605 238.61605 243.27805 249.49405 260.38606 271.27806 277.49406 284.49406 287.99406 291.88606 298.88606 302.38606 309.38606 316.38606 319.88606 332.33207 342.44007 348.65608 352.15608 359.15608 363.81806 367.31806 371.21006 377.42607 382.87208 388.31809 391.81809 398.0341 405.0341 412.0341 415.5341 421.7501 428.7501 432.2501 436.1421 443.1421 447.0341 453.2501 460.2501 466.4661">2.The bus clock frequency must be programmed to 50 MHz or less and an integer</tspan><tspan y="346.45" x="23.99604 30.99604 34.888044 41.888044 45.780046 52.780046 58.996046 62.496046 69.49605 74.15805 77.65805 81.55005 88.55005 94.76605 98.26605 104.482059 111.482059 116.14406 122.36006 125.86006 132.07607 135.96807 142.96807 149.18407 156.18407">divide of the core clock.</tspan><tspan y="362.45" x="7.504051 14.504051 23.996052 32.550054 39.550054 45.766054 49.266054 53.92805 57.820055 64.03606 69.482059 76.482059 79.982059 86.19806 90.09006 97.09006 103.30606 110.30606 113.80606 118.46806 123.130069 129.34607 136.34607 143.34607 149.56208 156.56208 162.77808 169.77808 173.27808 184.17008 191.17008 196.61608 200.50807 204.00807 211.00807 217.22408 220.72408 227.72408 232.38608 239.38608 246.38608 251.04808 257.26408 268.15608 279.04808 285.26408 292.26408 295.76408 299.65608 306.65608 310.15608 317.15608 324.15608 327.65608 340.10209 350.21009 356.4261 359.9261 366.9261 371.58808 375.08808 378.98008 385.19609 390.6421 396.0881 399.5881 403.0881 406.9801 413.1961 418.64213 424.08815 427.58815 431.48014 438.48014 444.69615 451.69615 455.19615 462.19615 466.85813 470.35813 476.57414 483.57414 490.57414 496.79014">3.The flash clock frequency must be programmed to 25 MHz or less, less than or equal</tspan><tspan y="378.45" x="23.99607 27.888072 34.88807 38.38807 42.28007 49.28007 55.49607 58.99607 65.99607 72.99607 78.44207 81.94207 88.15807 92.05007 99.05007 105.266078 112.266078 115.766078 119.266078 125.48208 132.48209 139.48209 142.98209 149.19809 156.19809 159.69809 163.59009 170.59009 174.48209 180.69809 187.69809 193.9141 198.5761 202.0761 209.0761 212.9681 219.9681 223.86009 230.86009 237.0761 240.5761 247.5761 252.2381 255.7381 259.6301 266.6301 272.8461 276.3461 282.5621 289.5621 294.2241 300.4401 303.9401 310.1561 314.0481 321.0481 327.2641 334.2641">to the bus clock, and an integer divide of the core clock.</tspan><tspan y="394.45" x="7.5040819 14.504082 23.996083 32.550085 39.550085 45.766084 49.266084 57.050085 60.942087 67.15809 74.15809 83.49609 90.49609 95.94209 99.44209 105.6581 109.550098 116.550098 122.7661 129.7661 133.2661 137.9281 142.5901 148.8061 155.8061 162.8061 169.02211 176.02211 182.23812 189.23812 192.73812 203.63011 210.63011 216.07611 219.96811 223.46811 230.46811 236.68412 240.18412 247.18412 251.84612 258.84614 265.84614 270.50813 276.72413 287.61613 298.50813 304.72413 311.72413 315.22413 319.11613 326.11613 329.61613 336.61613 342.83213 346.33213 350.22413 356.44013 361.88615 367.33216 370.83216 374.72416 381.72416 387.94017 394.94017 398.44017 405.44017 410.10215 413.60215 419.81816 426.81816 433.81816 440.03416 443.92616 447.42616 451.31816 458.31816 461.81816 465.71015 472.71015 478.92616 482.42616 489.42616 496.42616">4.The FlexBus clock frequency must be programmed to be less than or equal to the bus</tspan><tspan y="410.45" x="23.99607 30.21207 34.104074 41.104074 47.320074 54.320074 57.820074 62.48207 67.14407 73.36008 80.36008 87.36008 93.57608 100.57608 106.79208 113.79208">clock frequency.</tspan><tspan y="436.45" x=".00008010864 8.55408 15.55408 21.77008 25.27008 29.932082 36.932085 40.824087 44.716089 51.716089 61.82409 65.71609 72.71609 79.71609 83.21609 89.43209 94.09409 100.3101 103.8101 110.0261 113.5261 118.1881 124.404109 134.5121 138.0121 145.0121 149.6741 153.1741 157.0661 164.0661 170.2821 173.7821 184.6741 191.6741 196.3361 202.55211 206.05211 212.26811 219.26811 230.16011 241.05211 248.05211 255.05211 258.55213 264.76814 268.66014 275.66014 281.87614 288.87614 292.37614 298.59214 305.59214 312.59214 317.25413 321.14613 328.14613 335.14613 339.8081 346.0241 349.9161 353.8081 360.8081 367.8081 373.25413 376.75413 381.4161 388.4161 393.0781 396.5781 400.4701 407.4701 411.3621 416.8081 420.3081 427.3081 433.5241 440.5241 444.4161 450.6321 456.8481">The following are a few of the more common clock configurations for this device:</tspan><tspan y="460.85" x=".00007010864 10.108071 17.10807 21.00007 24.89207 31.89207 38.89207 42.39207 49.39207">Option 1:</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 54 18)" font-size="9" font-family="HelveticaLTStd" font-weight="bold"><tspan y="26.01031" x="382.482 388.97999 394.47898 399.48298 404.98197 407.97898 412.98298 416.48399 418.986 423.99 426.492 432.99 435.492 440.991 445.995 450.999 453.501 459.999 462.501 467.505 470.502 474.00303 476.50505 482.00404 487.50303 490.50004 493.00205 498.50105">Chapter 5 Clock Distribution</tspan></text>
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<text fill="#ff0000" xml:space="preserve" transform="matrix(1 0 0 1 54 763.756)" font-size="10" font-family="HelveticaLTStd" font-weight="bold"><tspan y="8.59766" x="180.87 188.65 194.20999 200.31999 205.87999 209.76999 215.32999 218.10999 220.88999 228.10999 234.21999 239.77999 242.55998 248.66999 254.22998 259.78999 265.34999 268.12998 270.90998 277.01997 280.34996 286.45994 290.34996 299.23997 304.79997 308.12995 310.90995 317.01994">General Business Information</tspan></text>
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