Ryan Malloy
de7a29c69e
Parse netlists into component graphs and render circuit diagrams via SchemDraw. Two layout strategies: loop layout for simple 2-terminal circuits (RC, RL, voltage divider) and labeled grid for complex circuits with active devices (BJT amplifiers, MOSFET). Backend: netlist parser, schematic engine, POST API endpoint. Frontend: SchematicViewer with zoom/download, stacked cell layout showing schematic + SPICE editor + waveform simultaneously.
45 lines
870 B
TOML
45 lines
870 B
TOML
[project]
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name = "spicebook"
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version = "2026.02.13"
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description = "Notebook interface for SPICE circuit simulation"
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requires-python = ">=3.12"
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authors = [{name = "Ryan Malloy", email = "ryan@supported.systems"}]
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dependencies = [
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"fastapi>=0.115.0",
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"uvicorn[standard]>=0.30.0",
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"pydantic>=2.0",
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"numpy>=1.24.0",
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"websockets>=12.0",
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"schemdraw>=0.19",
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]
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[project.optional-dependencies]
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dev = [
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"pytest>=8.0",
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"pytest-asyncio>=0.23",
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"httpx>=0.27",
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"ruff>=0.8",
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]
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[project.scripts]
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spicebook = "spicebook.main:main"
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[build-system]
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requires = ["hatchling"]
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build-backend = "hatchling.build"
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[tool.hatch.build.targets.wheel]
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packages = ["src/spicebook"]
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[tool.ruff]
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target-version = "py312"
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line-length = 100
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[tool.ruff.lint]
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select = ["E", "F", "I", "W"]
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[tool.pytest.ini_options]
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asyncio_mode = "auto"
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testpaths = ["tests"]
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