Ryan Malloy
e20a956f51
SPICE netlist to WireViz YAML converter with: - Custom lightweight netlist parser (.net/.cir/.sp) - Single-module mapper (subcircuit external interface) - Inter-module mapper (multi-board wiring) - Filter engine with glob patterns - Click CLI with auto-detection, inspection commands - Optional .asc parser via spicelib - Comprehensive test suite with fixtures
15 lines
428 B
Plaintext
15 lines
428 B
Plaintext
* Simple board netlist with one subcircuit
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* Has connectors J1 (power), J2 (signal I/O), and test point TP1
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.subckt amplifier_board VIN GND VOUT SIGNAL_IN
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* Internal components (passives, ICs — not relevant to wiring)
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R1 VIN N001 10k
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R2 N001 GND 10k
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U1 N001 VOUT GND VCC opamp
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* Boundary components (connectors/test points visible at board edge)
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J1 VIN GND PWR_CONN
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J2 SIGNAL_IN VOUT SIG_CONN
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TP1 N001
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.ends amplifier_board
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