Ryan Malloy
b8ff2d19da
Layered graph drawing approach to minimize cable crossings: - Layer assignment via BFS from external connectors (J*, TP*, P*) - Barycenter ordering (forward + backward sweep) within each layer - Connection orientation: earlier connector always on the left - Pin reordering: weighted average neighbor position groups pins by destination, reducing within-connector crossings - Connection sorting: shorter (adjacent-pair) connections first Fixes from Apollo safety review: - Explicit ValueError on pin remapping failures (was silent KeyError) - Weighted pin averaging for star topology (GND shared across modules) - Fully deterministic sort keys for reproducible output - Documented closure capture pattern in loop sort keys
365 lines
14 KiB
Python
365 lines
14 KiB
Python
"""Tests for the inter-module mapper."""
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from pathlib import Path
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from spice2wireviz.filter import FilterConfig
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from spice2wireviz.mapper.inter_module import (
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_build_adjacency,
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_compute_layer_ordering,
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_optimize_layout,
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_optimize_pin_order,
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_orient_connections,
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map_inter_module,
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)
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from spice2wireviz.parser.netlist import parse_netlist
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FIXTURES = Path(__file__).parent / "fixtures"
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class TestInterModuleMapping:
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def test_multi_board_connectors(self):
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netlist = parse_netlist(FIXTURES / "multi_board.net")
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result = map_inter_module(netlist)
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connectors = result["connectors"]
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# Should have connectors for each X instance and top-level components
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assert "X1" in connectors
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assert "X2" in connectors
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assert "X3" in connectors
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assert "J_CHASSIS" in connectors
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assert "TP_VCC" in connectors
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def test_instance_connector_type(self):
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netlist = parse_netlist(FIXTURES / "multi_board.net")
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result = map_inter_module(netlist)
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x1 = result["connectors"]["X1"]
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assert x1["type"] == "power_supply"
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def test_instance_pinlabels(self):
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netlist = parse_netlist(FIXTURES / "multi_board.net")
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result = map_inter_module(netlist)
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x2 = result["connectors"]["X2"]
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assert "VIN" in x2["pinlabels"]
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assert "GND" in x2["pinlabels"]
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assert "VOUT" in x2["pinlabels"]
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def test_cables_for_shared_nets(self):
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netlist = parse_netlist(FIXTURES / "multi_board.net")
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result = map_inter_module(netlist)
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# Should have cables connecting modules via shared nets
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cables = result["cables"]
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assert len(cables) >= 1
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def test_connections_exist(self):
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netlist = parse_netlist(FIXTURES / "multi_board.net")
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result = map_inter_module(netlist)
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connections = result["connections"]
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assert len(connections) >= 1
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def test_traceability_notes(self):
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netlist = parse_netlist(FIXTURES / "multi_board.net")
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result = map_inter_module(netlist)
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x1 = result["connectors"]["X1"]
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assert "SPICE instance" in x1["notes"]
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def test_top_level_test_point_style(self):
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netlist = parse_netlist(FIXTURES / "multi_board.net")
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result = map_inter_module(netlist)
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tp = result["connectors"]["TP_VCC"]
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assert tp.get("style") == "simple"
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class TestInterModuleFiltering:
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def test_exclude_instance(self):
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netlist = parse_netlist(FIXTURES / "multi_board.net")
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config = FilterConfig(exclude_refs=["X1"])
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result = map_inter_module(netlist, config)
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assert "X1" not in result["connectors"]
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assert "X2" in result["connectors"]
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def test_exclude_subcircuit(self):
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netlist = parse_netlist(FIXTURES / "multi_board.net")
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config = FilterConfig(exclude_subcircuits=["power_supply"])
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result = map_inter_module(netlist, config)
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assert "X1" not in result["connectors"]
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def test_no_ground_filter(self):
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netlist = parse_netlist(FIXTURES / "multi_board.net")
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config = FilterConfig(show_ground=False)
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result = map_inter_module(netlist, config)
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# GND should not appear in any connector's pinlabels
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for name, conn in result["connectors"].items():
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if "pinlabels" in conn:
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assert "GND" not in conn["pinlabels"], f"GND found in {name}"
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def test_no_power_filter(self):
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netlist = parse_netlist(FIXTURES / "multi_board.net")
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config = FilterConfig(show_power=False)
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result = map_inter_module(netlist, config)
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for name, conn in result["connectors"].items():
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if "pinlabels" in conn:
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assert "VCC" not in conn["pinlabels"], f"VCC found in {name}"
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class TestHierarchicalInterModule:
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def test_hierarchical_instances(self):
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netlist = parse_netlist(FIXTURES / "hierarchical.net")
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result = map_inter_module(netlist)
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connectors = result["connectors"]
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assert "X_REG" in connectors
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assert "X_SENSOR" in connectors
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assert "X_MAIN" in connectors
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def test_external_connectors(self):
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netlist = parse_netlist(FIXTURES / "hierarchical.net")
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result = map_inter_module(netlist)
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connectors = result["connectors"]
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assert "J_PWR" in connectors
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assert "J_USB" in connectors
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assert "TP_3V3" in connectors
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def test_grouped_parallel_wires(self):
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"""Parallel wires between same modules should be grouped."""
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netlist = parse_netlist(FIXTURES / "hierarchical.net")
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config = FilterConfig(group_parallel_wires=True)
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result = map_inter_module(netlist, config)
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# With grouping, fewer cables than total net connections
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cables = result["cables"]
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connections = result["connections"]
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assert len(cables) == len(connections)
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def test_ungrouped_wires(self):
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"""Without grouping, each wire gets its own cable."""
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netlist = parse_netlist(FIXTURES / "hierarchical.net")
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config = FilterConfig(group_parallel_wires=False)
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result = map_inter_module(netlist, config)
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# Each cable should have wirecount=1
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for cable in result["cables"].values():
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assert cable.get("wirecount", 1) == 1 or len(cable.get("colors", [])) == 1
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class TestLayoutOptimization:
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"""Tests for the Sugiyama-lite layout optimization."""
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def test_build_adjacency_weights(self):
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"""Adjacency weights count wires between connector pairs."""
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connections = [
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[{"A": [1, 2]}, {"W1": [1, 2]}, {"B": [1, 2]}],
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[{"A": 3}, {"W2": 1}, {"C": 1}],
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]
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adj = _build_adjacency(connections)
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assert adj["A"]["B"] == 2 # 2-wire cable
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assert adj["A"]["C"] == 1 # 1-wire cable
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assert adj["B"]["A"] == 2 # symmetric
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def test_layer_ordering_externals_first(self):
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"""External connectors (J*, TP*) should be placed at layer 0 (leftmost)."""
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adj = {
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"J1": {"X1": 2},
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"TP1": {"X1": 1},
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"X1": {"J1": 2, "TP1": 1, "X2": 3},
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"X2": {"X1": 3},
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}
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order = _compute_layer_ordering(["X1", "X2", "J1", "TP1"], adj)
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# Externals before modules
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j1_pos = order.index("J1")
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tp1_pos = order.index("TP1")
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x1_pos = order.index("X1")
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x2_pos = order.index("X2")
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assert j1_pos < x1_pos
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assert tp1_pos < x1_pos
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assert x1_pos < x2_pos
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def test_layer_ordering_hierarchical(self):
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"""Hierarchical fixture: externals -> X_REG -> X_MAIN -> X_SENSOR."""
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netlist = parse_netlist(FIXTURES / "hierarchical.net")
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result = map_inter_module(netlist)
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conn_names = list(result["connectors"].keys())
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# External connectors should come before all X* instances
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x_reg_pos = conn_names.index("X_REG")
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x_main_pos = conn_names.index("X_MAIN")
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x_sensor_pos = conn_names.index("X_SENSOR")
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for ext in ("J_PWR", "J_USB", "TP_3V3"):
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assert conn_names.index(ext) < x_reg_pos, f"{ext} should be before X_REG"
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# Module ordering by depth
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assert x_reg_pos < x_main_pos, "X_REG should be before X_MAIN"
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assert x_main_pos < x_sensor_pos, "X_MAIN should be before X_SENSOR"
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def test_layer_ordering_multi_board(self):
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"""Multi-board fixture: externals -> X1 -> X2 -> X3."""
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netlist = parse_netlist(FIXTURES / "multi_board.net")
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result = map_inter_module(netlist)
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conn_names = list(result["connectors"].keys())
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x1_pos = conn_names.index("X1")
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x2_pos = conn_names.index("X2")
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x3_pos = conn_names.index("X3")
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for ext in ("J_CHASSIS", "TP_VCC"):
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assert conn_names.index(ext) < x1_pos, f"{ext} should be before X1"
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assert x1_pos < x2_pos, "X1 should be before X2"
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assert x2_pos < x3_pos, "X2 should be before X3"
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def test_orient_connections_left_to_right(self):
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"""Connections should be oriented so the earlier connector is on the left."""
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connections = [
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[{"B": 1}, {"W1": 1}, {"A": 1}], # B is after A — should swap
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]
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positions = {"A": 0, "B": 1}
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oriented = _orient_connections(connections, positions)
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left_name = next(iter(oriented[0][0]))
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right_name = next(iter(oriented[0][2]))
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assert left_name == "A"
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assert right_name == "B"
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def test_orient_preserves_correct_direction(self):
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"""Already-correct orientation should be preserved."""
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connections = [
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[{"A": 1}, {"W1": 1}, {"B": 1}],
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]
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positions = {"A": 0, "B": 1}
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oriented = _orient_connections(connections, positions)
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assert next(iter(oriented[0][0])) == "A"
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def test_pin_reorder_groups_by_neighbor(self):
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"""Pins connecting to earlier neighbors should come before later ones."""
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# Connector C at position 2 connects to A(0) via pin 3 and B(3) via pin 1
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connections = [
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[{"C": 3}, {"W1": 1}, {"A": 1}], # pin 3 → A(pos 0)
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[{"C": 1}, {"W2": 1}, {"B": 1}], # pin 1 → B(pos 3)
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]
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positions = {"A": 0, "C": 2, "B": 3}
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new_labels, mapping = _optimize_pin_order(
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"C", ["P1", "P2", "P3"], connections, positions
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)
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assert mapping is not None
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# Pin 3 (connecting to A at pos 0) should come first
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assert new_labels[0] == "P3"
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# Pin 1 (connecting to B at pos 3) should come after
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assert new_labels[-1] == "P1" or new_labels.index("P1") > new_labels.index("P3")
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def test_pin_reorder_averaging_star_topology(self):
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"""A pin connected to multiple neighbors should use average position."""
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# Pin 1 of C connects to A(pos 0) AND D(pos 4) — avg = 2
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# Pin 2 of C connects to B(pos 1)
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connections = [
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[{"C": 1}, {"W1": 1}, {"A": 1}], # pin 1 → A(pos 0)
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[{"C": 1}, {"W2": 1}, {"D": 1}], # pin 1 → D(pos 4)
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[{"C": 2}, {"W3": 1}, {"B": 1}], # pin 2 → B(pos 1)
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]
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positions = {"A": 0, "B": 1, "C": 2, "D": 4}
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new_labels, mapping = _optimize_pin_order(
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"C", ["P1", "P2"], connections, positions
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)
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# Pin 2 (avg neighbor pos = 1) should come before Pin 1 (avg = (0+4)/2 = 2)
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assert mapping is not None
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assert new_labels == ["P2", "P1"]
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def test_optimize_layout_no_crash_on_single_connector(self):
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"""Single connector should pass through unchanged."""
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connectors = {"X1": {"pinlabels": ["A", "B"]}}
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cables: dict = {}
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connections: list = []
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result_c, _result_cb, _result_cn = _optimize_layout(connectors, cables, connections)
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assert result_c == connectors
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def test_optimize_layout_no_crash_on_empty(self):
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"""Empty inputs should pass through."""
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result_c, _result_cb, _result_cn = _optimize_layout({}, {}, [])
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assert result_c == {}
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def test_all_connections_reference_valid_pins(self):
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"""After layout optimization, all connection pin indices must be valid."""
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netlist = parse_netlist(FIXTURES / "hierarchical.net")
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result = map_inter_module(netlist)
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connectors = result["connectors"]
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for conn_set in result["connections"]:
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for entry in [conn_set[0], conn_set[2]]: # left and right connectors
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name = next(iter(entry))
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pins = entry[name]
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if isinstance(pins, int):
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pins = [pins]
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n_pins = len(connectors[name].get("pinlabels", []))
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if n_pins == 0:
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n_pins = connectors[name].get("pincount", 0)
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for p in pins:
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assert 1 <= p <= n_pins, (
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f"Pin {p} out of range for {name} ({n_pins} pins)"
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)
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def test_connections_sorted_by_distance(self):
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"""Shorter connections (adjacent pairs) should come before longer ones."""
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netlist = parse_netlist(FIXTURES / "hierarchical.net")
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result = map_inter_module(netlist)
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conn_names = list(result["connectors"].keys())
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positions = {name: i for i, name in enumerate(conn_names)}
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prev_dist = 0
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for conn_set in result["connections"]:
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left = next(iter(conn_set[0]))
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right = next(iter(conn_set[2]))
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dist = abs(positions.get(right, 0) - positions.get(left, 0))
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assert dist >= prev_dist or dist == prev_dist, (
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f"Connection {left}->{right} (dist={dist}) comes after dist={prev_dist}"
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)
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prev_dist = dist
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def test_layer_ordering_all_disconnected(self):
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"""All connectors disconnected — all assigned to the same layer."""
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adj: dict[str, dict[str, int]] = {}
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order = _compute_layer_ordering(["X3", "X1", "X2"], adj)
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assert set(order) == {"X1", "X2", "X3"}
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def test_layer_ordering_cycle(self):
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"""Cycle in connectivity — BFS should not infinite loop."""
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adj = {
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"J1": {"X1": 1},
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"X1": {"J1": 1, "X2": 1},
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"X2": {"X1": 1, "X3": 1},
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"X3": {"X2": 1, "J1": 1},
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}
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order = _compute_layer_ordering(["J1", "X1", "X2", "X3"], adj)
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assert len(order) == 4
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# J1 is external, should be at layer 0 (first)
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assert order[0] == "J1"
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def test_pin_reorder_weighted_star(self):
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"""In star topology, heavier connections should pull pin position more."""
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# Pin 1 connects to A(pos 0, 3-wire cable) and D(pos 6, 1-wire cable)
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# Weighted avg = (0*3 + 6*1) / (3+1) = 1.5
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# Pin 2 connects to B(pos 3, 1-wire cable)
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# Avg = 3.0
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# So pin 1 (1.5) should come before pin 2 (3.0)
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connections = [
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[{"C": [1, 1, 1]}, {"W1": [1, 2, 3]}, {"A": [1, 2, 3]}], # 3-wire to A
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[{"C": 1}, {"W2": 1}, {"D": 1}], # 1-wire to D
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[{"C": 2}, {"W3": 1}, {"B": 1}], # 1-wire to B
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]
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positions = {"A": 0, "B": 3, "C": 2, "D": 6}
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new_labels, _mapping = _optimize_pin_order(
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"C", ["P1", "P2"], connections, positions
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)
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# Pin 1 weighted avg ≈ 1.5, pin 2 avg = 3.0 → pin 1 first (no reorder needed)
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assert new_labels[0] == "P1"
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