85 lines
2.4 KiB
Markdown
85 lines
2.4 KiB
Markdown
# WireViz
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## Summary
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WireViz is a simple yet flexible markup language for documenting wires and connector pinouts with beautiful graphical output.
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It is based on GraphViz and designed as an "extension" of it. A parser reads a WireViz file and generates valid GraphViz output, which can instantly be rendered to SVG/PNG.
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## Features
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* WireViz is fully text based
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* No special editor required
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* Human readable
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* Easy version control
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* GraphViz-like syntax
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* Auto-generates standard wire color schemes and allows custom ones if needed
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* DIN 47100 (WT/BN/GN/YE/GY/PK/BU/RD/BK/VT/...)
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* IEC ??? (BN/RD/OR/YE/GN/BU/VT/GY/WT/BK/...)
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* Allows more than one connector per side, as well as loopbacks
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* Will include images of known connectors, together with their pinouts
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## Example
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WireViz input file:
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// define connectors
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X1 [type="D-Sub DE-9",
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subtype="female",
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num_pins=9,
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pin_labels="DCD|RX|TX|DTR|GND|DSR|RTS|CTS|RI",
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position=L
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]
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X2 [type="Molex KK 254 6-pin",
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subtype="female",
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num_pins=6,
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pin_labels="GND|RX|TX|NC|OUT|IN",
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position=R
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]
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// define wire
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W1 [type="3x 0,25 mm² shielded",
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length="0.2m",
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num_wires=3,
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colors="din47100",
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shield=true
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]
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// define connections
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X1:5 -> W1:1 -> X2:1 // GND
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X1:2 -> W1:2 -> X2:3 // TX-RX
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X1:3 -> W1:3 -> X2:2 // RX-TX
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X1:5 -> W1:S // shield
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X2:5 -> X2:6 // loop
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Output file:
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GraphViz code generated by parser:
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digraph G {
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graph [rankdir = LR, ranksep=2, fontname = "arial"];
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edge [arrowhead=none, fontname = "arial"];
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node [shape=record, style=rounded, fontname = "arial"];
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X1[label="X1 | D-Sub DE-9 | female | {{DCD|RX|TX|DTR|GND|DSR|RTS|CTS|RI} | {<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6|<p7>7|<p8>8|<p9>9}} "];
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X2[label="X2 | Molex KK 254 6-pin | female | {{<p1>1|<p2>2|<p3>3|<p4>4|<p5>5|<p6>6} | {GND|RX|TX|NC|OUT|IN}}"];
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W1[label="W1 | 3x 0,25 mm² shielded | 0.2 m | {{<w1i>1|<w2i>2|<w3i>3|<wsi>}|{WT|BN|GN|Shield}|{<w1o>1|<w2o>2|<w3o>3|<wsi>}}}"];
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X1:p5 -> W1:w1i; W1:w1o -> X2:p1;
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X1:p2 -> W1:w2i; W1:w2o -> X2:p3;
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X1:p3 -> W1:w3i; W1:w3o -> X2:p2;
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X1:p5 -> W1:wsi;
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X2:p5:w -> X2:p6:w
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}
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## Status
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This is very much a work in progress, and mainly an idea in my head.
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