spice2wireviz/tests/fixtures/simple_board.asc
Ryan Malloy 08c92bfefb Add tiered .asc parser with companion netlist resolution
Implement three-tier resolution for LTspice .asc schematic files:

1. Companion netlist - finds .net/.cir/.sp beside the .asc (automatic)
2. LTspice generation - invokes LTspice binary (opt-in via --generate-netlist)
3. Metadata-only fallback - extracts component refs/values without connectivity

Safety: DataCompleteness enum forces callers to check completeness.
CLI blocks diagram generation on METADATA_ONLY with clear remediation.
Metadata enrichment is additive-only with protected field guards.

Also: update project URLs to Gitea, add .asc usage docs to README,
fix pre-existing ruff warning in test_single_module.py.
2026-02-13 04:59:03 -07:00

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Version 4
SHEET 1 880 680
SYMBOL res 192 160 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 192 288 R0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL Opamps\\opamp 336 256 R0
SYMATTR InstName U1
SYMATTR Value opamp
SYMBOL conn 48 144 R0
SYMATTR InstName J1
SYMATTR Value PWR_CONN
SYMBOL conn 48 288 R0
SYMATTR InstName J2
SYMATTR Value SIG_CONN
SYMBOL TestPoint 288 128 R0
SYMATTR InstName TP1
WIRE 96 176 192 176
WIRE 96 320 192 320
WIRE 192 288 192 256
WIRE 192 160 192 128
WIRE 288 128 192 128
WIRE 336 224 192 224
WIRE 336 288 336 320
WIRE 448 256 400 256
TEXT 48 432 Left 2 !.subckt amplifier_board VIN GND VOUT SIGNAL_IN
TEXT 48 464 Left 2 !.ends amplifier_board