Ryan Malloy
95ed08866c
- Gate model/value heuristic output behind --verbose/-v flag (quiet by default) - Add wireviz>=0.4 as dev dependency for roundtrip render tests - Generate SVG/PNG diagram renders for inter_module, single_module, hierarchical - Embed rendered diagrams in README with layout optimization callout
161 lines
2.2 KiB
YAML
161 lines
2.2 KiB
YAML
metadata:
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title: 'Wiring diagram: hierarchical'
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source: tests/fixtures/hierarchical.net
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generator: spice2wireviz 2026.2.14
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connectors:
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J_PWR:
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type: BARREL_JACK
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pinlabels:
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- VIN_RAW
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- GND
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notes: 'SPICE ref: J_PWR'
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TP_3V3:
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type: TP
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style: simple
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pinlabels:
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- V3V3
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notes: 'SPICE ref: TP_3V3'
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J_USB:
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type: USB_B_CONN
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pinlabels:
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- GND
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- USB_DP
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- USB_DM
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notes: 'SPICE ref: J_USB'
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X_REG:
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type: regulator
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pinlabels:
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- VIN
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- GND
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- VOUT
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notes: 'SPICE instance: X_REG (regulator)'
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X_MAIN:
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type: main_board
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pinlabels:
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- USB_D+
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- USB_D-
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- VCC
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- GND
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- SDA
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- SCL
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- ALERT
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notes: 'SPICE instance: X_MAIN (main_board)'
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X_SENSOR:
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type: sensor_module
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pinlabels:
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- VCC
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- GND
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- SDA
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- SCL
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- ALERT
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notes: 'SPICE instance: X_SENSOR (sensor_module)'
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cables:
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W1:
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category: bundle
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colors:
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- BK
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- ''
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wirelabels:
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- GND
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- VIN_RAW
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notes: 'Nets: GND, VIN_RAW'
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W2:
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category: bundle
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wirecount: 2
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wirelabels:
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- USB_DM
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- USB_DP
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notes: 'Nets: USB_DM, USB_DP'
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W3:
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colors:
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- BK
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wirelabels:
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- GND
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notes: 'Net: GND'
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W5:
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wirecount: 1
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wirelabels:
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- V3V3
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notes: 'Net: V3V3'
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W7:
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category: bundle
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colors:
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- BK
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- ''
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wirelabels:
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- GND
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- V3V3
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notes: 'Nets: GND, V3V3'
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W8:
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category: bundle
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wirecount: 3
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wirelabels:
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- ALERT_SIG
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- I2C_SCL
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- I2C_SDA
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notes: 'Nets: ALERT_SIG, I2C_SCL, I2C_SDA'
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W9:
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category: bundle
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colors:
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- BK
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- ''
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wirelabels:
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- GND
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- V3V3
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notes: 'Nets: GND, V3V3'
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connections:
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- - J_USB: 1
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- W3: 1
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- X_REG: 2
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- - X_REG:
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- 2
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- 3
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- W7:
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- 1
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- 2
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- X_MAIN:
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- 4
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- 3
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- - X_MAIN:
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- 7
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- 6
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- 5
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- W8:
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- 1
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- 2
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- 3
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- X_SENSOR:
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- 5
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- 4
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- 3
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- - TP_3V3: 1
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- W5: 1
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- X_REG: 3
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- - J_USB:
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- 3
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- 2
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- W2:
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- 1
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- 2
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- X_MAIN:
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- 2
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- 1
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- - X_REG:
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- 2
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- 3
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- W9:
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- 1
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- 2
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- X_SENSOR:
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- 2
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- 1
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- - J_PWR:
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- 2
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- 1
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- W1:
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- 1
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- 2
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- X_REG:
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- 2
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- 1
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