spice2wireviz/tests/fixtures/hierarchical.net
Ryan Malloy e20a956f51 Initial project structure for spice2wireviz
SPICE netlist to WireViz YAML converter with:
- Custom lightweight netlist parser (.net/.cir/.sp)
- Single-module mapper (subcircuit external interface)
- Inter-module mapper (multi-board wiring)
- Filter engine with glob patterns
- Click CLI with auto-detection, inspection commands
- Optional .asc parser via spicelib
- Comprehensive test suite with fixtures
2026-02-13 01:24:41 -07:00

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* Hierarchical netlist with nested subcircuits and global nets
* Tests continuation lines, parameters, .global directive
.global VCC GND
.subckt regulator VIN VOUT GND
+ ENABLE=1
R1 VIN N001 100
C1 N001 GND 10u
U1 N001 VOUT GND VCC LDO EN=ENABLE
J1 VIN GND INPUT_CONN
TP1 VOUT
.ends regulator
.subckt sensor_module SDA SCL VCC GND ALERT
* I2C sensor with pullups and test points
R_SDA SDA VCC 4.7k
R_SCL SCL VCC 4.7k
U1 SDA SCL VCC GND ALERT BME280
J1 SDA SCL VCC GND ALERT I2C_HDR
TP1 ALERT
.ends sensor_module
.subckt main_board VCC GND SDA SCL ALERT USB_D+ USB_D-
; Main MCU board with USB and I2C
U1 VCC GND SDA SCL USB_D+ USB_D- MCU
J1 USB_D+ USB_D- GND USB_CONN
J2 SDA SCL VCC GND I2C_CONN
P1 VCC GND POWER_PLUG
.ends main_board
* Top-level system wiring
X_REG VIN_RAW V3V3 GND regulator ENABLE=1
X_SENSOR I2C_SDA I2C_SCL V3V3 GND ALERT_SIG sensor_module
X_MAIN V3V3 GND I2C_SDA I2C_SCL ALERT_SIG USB_DP USB_DM main_board
* External connectors
J_PWR VIN_RAW GND BARREL_JACK
J_USB USB_DP USB_DM GND USB_B_CONN
TP_3V3 V3V3