Ryan Malloy
b8ff2d19da
Layered graph drawing approach to minimize cable crossings: - Layer assignment via BFS from external connectors (J*, TP*, P*) - Barycenter ordering (forward + backward sweep) within each layer - Connection orientation: earlier connector always on the left - Pin reordering: weighted average neighbor position groups pins by destination, reducing within-connector crossings - Connection sorting: shorter (adjacent-pair) connections first Fixes from Apollo safety review: - Explicit ValueError on pin remapping failures (was silent KeyError) - Weighted pin averaging for star topology (GND shared across modules) - Fully deterministic sort keys for reproducible output - Documented closure capture pattern in loop sort keys
94 lines
1.3 KiB
YAML
94 lines
1.3 KiB
YAML
metadata:
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title: 'Wiring diagram: multi_board'
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source: tests/fixtures/multi_board.net
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generator: spice2wireviz 2026.2.13
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connectors:
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J_CHASSIS:
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type: chassis_gnd
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pinlabels:
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- EARTH
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- GND
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notes: 'SPICE ref: J_CHASSIS'
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TP_VCC:
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type: TP
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style: simple
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pinlabels:
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- VCC
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notes: 'SPICE ref: TP_VCC'
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X1:
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type: power_supply
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pinlabels:
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- VCC
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- GND
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notes: 'SPICE instance: X1 (power_supply)'
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X2:
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type: amplifier
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pinlabels:
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- VIN
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- GND
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- VOUT
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notes: 'SPICE instance: X2 (amplifier)'
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X3:
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type: io_board
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pinlabels:
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- GND
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- SIG_IN
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- SIG_OUT
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- CTRL
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notes: 'SPICE instance: X3 (io_board)'
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cables:
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W1:
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colors:
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- BK
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wirelabels:
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- GND
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notes: 'Net: GND'
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W3:
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colors:
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- RD
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wirelabels:
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- VCC
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notes: 'Net: VCC'
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W5:
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category: bundle
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colors:
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- BK
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- RD
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wirelabels:
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- GND
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- VCC
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notes: 'Nets: GND, VCC'
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W6:
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colors:
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- BK
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wirelabels:
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- GND
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notes: 'Net: GND'
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W8:
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wirecount: 1
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wirelabels:
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- AUDIO_OUT
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notes: 'Net: AUDIO_OUT'
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connections:
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- - TP_VCC: 1
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- W3: 1
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- X1: 1
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- - X1:
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- 2
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- 1
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- W5:
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- 1
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- 2
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- X2:
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- 2
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- 1
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- - X2: 3
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- W8: 1
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- X3: 2
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- - J_CHASSIS: 2
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- W1: 1
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- X1: 2
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- - X1: 2
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- W6: 1
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- X3: 1
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