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Ryan Malloy 5252d1d73c Add hardware reference docs (A3981, K60, RYS352A) 
Allegro A3981 stepper motor driver: datasheet, KiCad symbols/footprint,
3D model (TSSOP-28). Two per G2 board, SPI-controlled, AUTO microstep.

NXP MK60DN512VLQ10 (Kinetis K60): datasheet and 1300-page reference
manual. Cortex-M4 96MHz MCU running the G2 firmware.

Reyax RYS352A GPS module: datasheet and PAIR command guide.
GPS receiver on the G2 board (used for auto-location/satellite lookup).

All extracted as markdown + page images + vector SVGs for LLM context.
Binary assets (PDFs, PNGs, SVGs, STEP, WRL) stored via git-lfs.
2026-02-14 18:36:42 -07:00

123 lines
36 KiB (Stored with Git LFS)
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<text xml:space="preserve" transform="matrix(1 0 0 1 54 54)" font-size="14" font-family="TimesLTStd"><tspan y="11.85" x="0 4.662 10.878 15.540001 21.756 26.418002 32.634004 39.634004 45.850004 52.066 55.566 61.782 65.674 72.674 78.89001 85.89001 89.39001 92.89001 101.44401 108.44401 112.336009 117.782009 121.282009 127.49801 133.714 140.714 144.214 151.214 157.43001 160.93001 167.93001 174.93001 181.93001 188.14601 191.64601 198.64601 205.64601 209.14601 219.25402 223.91602 227.80802 231.70001 235.59201 242.59201 249.59201 253.09201 259.308 262.808 269.808 276.02403 286.13203 289.63203 293.52403 298.186 302.078 312.97 316.47 323.47 329.686 333.578 340.578 346.794 350.294 354.186 361.186 364.686 368.578 375.578">reference clock. This can be done by writing a new trim value to the</tspan><tspan y="27.85" x=".00003 9.338031 16.338032 21.000033 28.784033 38.122034 46.676034 56.014036 60.676034 73.12203 77.784038 81.67603 91.01404 98.01404 102.67604 110.460048 119.79805 127.582057 136.13605 145.47405 150.13605 162.58205 167.24405 170.74405 177.74405 181.63605 185.52805 190.97405 194.47405 204.58205 211.58205 217.79805 224.79805 228.29805 232.19005 239.19005 245.40605 248.90605 254.35205 258.24406 265.24406 275.35206 278.85206 283.51405 292.85206 302.19007 305.69007 311.90608 315.79808 322.79808 329.01408 336.01408 339.51408 343.40608 348.85209 352.35209 357.7981 364.0141 367.9061 374.1221 380.3381 384.2301 390.4461 397.4461 400.9461 407.9461 412.6081 416.1081 423.1081 430.1081 433.6081 443.7161 448.37809 452.27009 456.16209 460.05409 467.05409 474.05409 477.55409">C3[SCTRIM]:C4[SCFTRIM] bits when the slow IRC clock is selected or by writing a</tspan><tspan y="43.85" x=".00006 7.00006 13.216061 23.324063 26.824063 30.716063 35.378065 39.270067 50.162069 53.662069 60.662069 66.87807 70.770069 77.770069 83.98607 87.48607 91.37807 98.37807 101.87807 105.770069 112.770069 118.98607 122.48607 131.82407 138.82407 143.48607 151.27007 160.60807 169.16207 178.50006 183.16207 195.60807 200.27007 203.77007 210.77007 214.66207 218.55406 224.00006 227.50006 237.60807 244.60807 250.82407 257.82408 261.32408 265.21607 272.21607 278.43208 281.93208 286.59407 292.81007 298.25608 302.14808 305.64808 310.31007 319.64808 328.98609 332.48609 338.7021 342.5941 349.5941 355.8101 362.8101 366.3101 370.2021 375.6481 379.1481 384.59413 390.81013 394.70213 400.91813 407.13414 411.02613 417.24214 424.24214 427.74214 431.24214 439.7961 446.7961 453.01213 456.51213 460.4041 467.4041 471.2961 477.51213 482.1741 489.1741 495.3901">new trim value to the C4[FCTRIM] bits when the fast IRC clock is selected. The internal</tspan><tspan y="59.85" x=".00010999999 4.6621105 10.878111 15.540112 21.756112 26.418112 32.634115 39.634115 45.850114 52.066114 55.566114 61.782114 65.67411 72.67411 78.890117 85.890117 89.390117 96.390117 102.60612 107.26812 111.16012 118.16012 125.16012 128.66013 132.55213 137.99813 141.49813 148.49813 153.16013 160.16013 167.16013 174.16013 178.82213 182.71413 186.60613 193.60613 200.60613 206.82213 210.71413 214.21413 218.10613 225.10613 228.60613 232.49813 239.49813 245.71413 249.21413 253.10613 257.76814 261.66014 272.55213 276.05213 283.05213 289.26814 293.16014 300.16014 306.37614 309.87614 319.98414 324.64613 328.53813 332.4301 336.3221 342.53813 349.53813">reference clock period is proportional to the trim value written.</tspan><tspan y="75.85" x=".00013999999 9.338141 16.338143 21.000144 28.784144 38.122148 46.676149 56.01415 60.676149 73.12215 77.78415 81.67615 91.014148 98.014148 102.67615 110.46015 119.79816 127.58216 136.13616 145.47415 150.13616 162.58216 167.24416 170.74416 175.40616 179.29816 183.96016 187.46016 196.79816 203.79816 208.46016 213.12216 222.46016 231.79816 239.58216 244.24416 252.14015 259.14015 263.80213 267.30213 273.51814 280.51814 287.51814 291.01814 300.35615 307.35615 312.01814 319.80213 329.14015 337.69413 347.03215 351.69413 364.14015 368.80213 372.30213 376.9641 380.8561 385.5181 389.0181 398.3561 405.3561 410.0181 414.68009 424.0181 433.3561 441.1401 445.8021 453.6981 460.6981 465.36009 468.86009 475.86009 479.75209 483.64408">C3[SCTRIM]:C4[SCFTRIM] (if C2[IRCS]=0) and C4[FCTRIM] (if C2[IRCS]=1) bits</tspan><tspan y="91.85" x=".00010999999 6.2161109 10.878111 15.540112 21.756112 27.97211 31.86411 35.364114 39.256116 46.256116 52.472116 55.972116 68.41811 77.75612 87.86412 97.97212 108.080127 116.634128 125.97212 134.52613 144.63413 148.13413 152.79613 157.45813 163.67414 170.67414 177.67414 183.89014 190.89014 197.10614 204.10614 207.60614 211.49814 216.16014 219.66014 223.55214 230.55214 236.76815 240.26815 252.71414 262.05216 272.16017 275.66017 279.55216 284.99818 288.49818 292.39018 299.39018 302.89018 310.67417 320.01219 324.67417 328.17417 335.17417 339.83616 343.33616 352.67417 361.22816 369.01216 373.67414 377.17414 388.06614 395.06614 402.06614 408.28215 413.72816">affect the MCGOUTCLK frequency if the MCG is in FBI or BLPI modes.</tspan><tspan y="107.85" x=".00013999999 9.338141 16.338143 21.000144 28.784144 38.122148 46.676149 56.01415 60.676149 73.12215 77.78415 81.67615 91.014148 98.014148 102.67615 110.46015 119.79816 127.58216 136.13616 145.47415 150.13616 162.58216 167.24416 170.74416 175.40616 179.29816 183.96016 187.46016 196.79816 203.79816 208.46016 213.12216 222.46016 231.79816 239.58216 244.24416 252.14015 259.14015 263.80213 267.30213 274.30213 278.19413 282.08613 287.53215 291.03215 297.24815 301.14015 306.58616 313.58616 317.08616 323.30216 327.96415 332.62614 338.84214 345.05815 348.95014 352.45014 356.34214 363.34214 369.55815 373.05815 385.50416 394.84217 404.95018 415.05818 425.16618 433.72016 443.05818 451.61216">C3[SCTRIM]:C4[SCFTRIM] (if C2[IRCS]=0) bits also affect the MCGOUTCLK</tspan><tspan y="123.85" x=".00016999999 4.6621706 9.324171 15.540172 22.540173 29.540173 35.756174 42.756174 48.97217 55.97217 59.47217 63.364175 68.02618 71.52618 75.418178 82.418178 88.63418 92.13418 104.58018 113.91818 124.026187 127.526187 131.41819 136.86418 140.36418 144.25618 151.25618 154.75618 162.54018 171.09418 175.75618 179.25618 190.14818 197.14818 204.14818 210.36418">frequency if the MCG is in FEI mode.</tspan><tspan y="148.25" x=".00017999999 10.108181 17.108181 24.108181 28.000182 31.892182 35.784185 42.784185 49.784185 56.000185 59.892187 63.784189 70.78419 74.28419 77.78419 81.676189 88.676189 92.568187 98.01418 101.51418 107.73019 111.622188 118.622188 124.83819 131.8382 135.3382 141.5542 147.7702 154.7702 158.2702 165.2702 171.4862 174.9862 181.20221 188.20221 194.41822 201.41822 205.31021 211.52622 218.52622 222.02622 225.91822 232.91822 236.41822 244.20221 248.09421 255.09421 262.0942 265.5942 276.4862 283.4862 290.4862 296.7022 300.2022 307.2022 314.2022 317.7022 323.14823 329.36424 333.25624 337.14823 341.04023 348.04023 355.04023 358.54023 367.87825 374.87825 379.54023 384.2022 393.54023 402.87825 411.43223 421.54023 430.0942 440.2022 444.8642 448.3642 454.5802 461.5802">Additionally, this clock can be enabled in Stop mode by setting C1[IRCLKEN] and</tspan><tspan y="164.25" x=".00016999999 9.338171 16.338171 21.000172 25.662173 35.000177 43.554178 51.338178 59.122179 67.67618 76.23018 86.33818 91.00018 94.50018 98.00018 105.00018 108.89218 115.89218 122.108188 126.77019 136.87819 140.77019 146.21619 152.43219 155.93219 159.82419 166.82419 170.71619 176.16219 179.66219 185.87819 189.77019 196.77019 202.98619 209.98619 213.48619 217.37819 222.82419 226.32419 233.32419 237.21619 242.66219 248.87819 255.87819 259.7702 265.9862 272.9862 276.4862 280.3782 287.3782 290.8782 298.6622 302.5542 309.5542 316.5542 320.0542 330.9462 337.9462 344.9462 351.1622">C1[IREFSTEN], otherwise this clock is disabled in Stop mode.</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 258.8)" font-size="16" font-family="HelveticaLTStd" font-weight="bold"><tspan y="12.15625" x=".00612 8.902121 17.798123 22.246123 31.142125 35.590127">25.4.4</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 112.65332 258.8)" font-size="16" font-family="HelveticaLTStd" font-weight="bold"><tspan y="12.15625" x=".00612 10.678121 19.574122 24.902123 33.798124 40.02212 49.798124 58.694124 63.142126 67.590129 79.14213 88.03813 93.366138 102.26214 108.48614 117.38214 127.15814 136.05414 144.95014 149.39813 160.95014 165.39813 175.17414 184.07013">External Reference Clock</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 54)" font-size="14" font-family="TimesLTStd"><tspan y="241.04999" x=".00413 8.55813 15.55813 21.774132 25.274132 37.72013 47.058134 57.166135 60.666135 71.558139 78.558139 85.558139 92.558139 96.450138 102.66614 106.16614 112.38214 118.598148 125.598148 129.09815 134.54415 141.54415 148.54415 155.54415 162.54415 167.20615 171.09815 174.59815 180.81415 187.81415 191.31415 197.53015 204.53015 208.42215 214.63816 219.30016 226.30016 232.51616 236.40816 239.90816 244.57016 250.78617 255.44817 261.66416 266.32615 272.54216 279.54216 285.75816 291.97416 295.47416 301.69017 305.58216 312.58216 318.79817 325.79817 329.29817 333.19017 340.19017 343.69017 349.90617 353.79817 357.69017 361.19017 372.08216 379.08216 386.08216 392.29817 397.74418 401.24418 404.74418 412.52818 418.74418 424.96018 428.46018 432.35218 439.35218 445.56819 449.06819 456.06819 462.28419 469.28419 473.17619 479.39219">The MCG module can support an external reference clock in all modes. See the device</tspan><tspan y="257.05" x=".00416 7.00416 13.2201609 17.112162 23.328164 28.774165 35.774164 41.99016 48.20616 52.098165 55.598165 60.260164 67.26016 71.922168 75.422168 81.63817 88.63817 92.53017 98.74617 103.40817 110.40817 116.624179 120.516178 124.016178 128.67818 134.89418 139.55619 145.77219 150.43419 156.65019 163.65019 169.8662 176.0822 179.5822 184.2442 188.9062 195.12221 202.12221 209.12221 215.33821 222.33821 228.55422 235.55422 239.05422 243.71622 249.93222 256.93223 263.93223 270.14823 273.64823 277.14823 290.36424 297.36424 303.58024 310.58024 314.08024 323.41825 330.41825 335.08024 339.74223 349.08024 357.63423 365.4182 373.2022 377.8642 381.3642 385.2562 390.7022 394.2022 399.64823 405.86424 409.75624 413.25624 416.75624 420.64823 427.64823 433.86424 437.36424 443.58024 450.58024 454.47224 460.68824 465.35023 472.35023 478.56623">datasheet for external reference frequency range. When C1[IREFS] is set, the external</tspan><tspan y="273.05" x=".00416 4.66616 10.88216 15.544161 21.760163 26.422163 32.638166 39.638166 45.854166 52.070165 55.570165 61.786165 65.67816 72.67816 78.894168 85.894168 89.394168 99.50217 103.394168 107.28616 111.17816 114.67816 121.67816 128.67816 132.57016 136.07016 143.07016 149.28617 152.78617 159.78617 165.23217 171.44817 178.44817 181.94817 188.94817 195.94817 199.44817 203.34017 210.34017 216.55617 220.05617 227.84017 236.39417 244.94817 248.44817 255.44817 260.11018 263.61018 271.39418 279.94816 288.50215 292.00215 295.50215 300.16413 307.16413 310.66413 314.55613 321.55613 327.77214 333.21815 339.43415 342.93415 353.82615 360.82615 367.82615 374.04216 379.48817 382.98817 386.48817 390.38017 397.38017 403.59617 407.09617 411.75816 416.42015 422.63615 429.63615 436.63615 442.85215 449.85215 456.06816 463.06816 466.56816 472.78416 479.00016 486.00016 489.50016 496.50016">reference clock will not be used by the FLL or PLL. In these modes, the frequency can be</tspan><tspan y="289.05" x=".00416 6.2201607 13.2201609 20.220162 26.436161 30.328162 33.828165 37.720167 44.720167 48.220167 52.112169 59.112169 65.32817 68.82817 79.72017 85.93617 92.93617 96.82817 107.72017 114.72017 125.61217 129.11217 133.77417 138.43618 144.65218 151.65218 158.65218 164.86818 171.86818 178.08419 185.08419 188.58419 192.47618 199.47618 205.69219 209.19219 215.40819 222.40819 226.30019 233.30019 237.96219 241.85419 248.07019 255.07019 261.2862 265.1782 268.6782 272.5702 276.4622 287.3542 291.2462 298.2462 305.2462 308.7462 314.1922 321.1922 327.4082 333.6242 337.5162 342.1782 346.0702 352.2862 358.5022 362.3942 366.2862 373.2862 380.2862 385.7322 389.2322 399.3402 403.2322 407.1242 411.0162 414.5162 419.96223 426.96223 433.96223 440.96223 447.96223 452.6242 456.5162">equal to the maximum frequency the chip-level timing specifications will support.</tspan><tspan y="313.44999" x=".00416 4.66616 9.32816 12.82816 19.04416 26.04416 33.04416 36.54416 43.54416 48.206159 51.706159 55.59816 62.59816 68.81416 72.31416 81.65216 94.09816 102.65216 106.15216 113.15216 117.04416 120.93616 126.38216 129.88216 136.09816 140.76016 146.97617 150.47617 156.69217 162.13817 167.58417 173.80017 178.46218 182.35417 188.57018 195.57018 199.07018 202.96218 209.96218 216.17818 219.67818 225.12418 229.01618 236.01618 246.12418 249.62418 253.51618 260.51618 264.40818 270.62419 275.28617 282.28617 288.50218 292.39418 295.89418 300.55616 306.77217 311.43415 317.65016 322.31214 328.52815 335.52815 341.74415 347.96015 351.46015 357.67616 361.56816 368.56816 374.78416 381.78416 385.28416 389.17616 394.62217 398.12217 404.33818 411.33818 417.55418 424.55418 428.44618 434.66218 441.66218 445.16218 451.37818 455.27018 462.27018 469.27018">If any of the CME bits are asserted the slow internal reference clock is enabled along</tspan><tspan y="329.44999" x=".00416 10.112161 14.004161 17.896162 24.896162 28.396162 32.288164 39.288164 45.50416 49.00416 55.22016 62.22016 68.436168 75.436168 79.32816 85.54417 92.54417 96.04417 102.26017 109.26017 113.15217 119.36817 124.030178 131.03018 137.24619 141.13819 144.63819 150.85419 154.74619 161.74619 167.96219 174.96219 178.46219 189.35419 196.35419 203.35419 207.24619 211.13819 218.13819 222.80019 226.30019 229.80019 237.58419 244.58419 249.24619 252.74619 256.63819 263.63819 269.8542 273.3542 279.5702 285.7862 291.2322 297.4482 300.9482 311.0562 318.0562 324.27223 331.27223 334.77223 344.11024 351.11024 355.77223 365.11024 377.55625 386.11024 393.11024 397.77223 405.6682 412.6682 416.1682 419.6682 425.88423 429.38423 433.2762 440.2762 445.72224 451.16825 454.66825 461.66825 466.33024 469.83024 476.04624 479.93824 486.93824 493.15425">with the enabled external clock monitor. For the case when C6[CME0]=1, a loss of clock</tspan><tspan y="345.44999" x=".00416 3.8961604 9.342161 12.842161 19.842162 26.058163 29.950163 36.166166 42.382165 46.274168 52.490167 59.490167 62.990167 66.882167 71.54417 75.04417 78.936168 85.936168 92.15217 95.65217 105.76017 113.544178 122.88217 129.88217 133.38217 139.59818 146.59818 150.49018 156.70618 161.36818 168.36818 174.58419 178.47618 181.97618 186.63819 192.85419 197.51619 203.7322 208.3942 214.6102 221.6102 227.8262 234.0422 237.5422 242.20421 248.42021 252.31221 256.20423 261.65025 265.15025 272.15025 278.36625 282.25825 289.25825 299.36625 302.86625 309.08226 312.58226 323.47425 327.36625 334.36625 338.25825 349.15025 356.15025 367.04225 370.54225 375.20423 379.8662 386.0822 393.0822 400.0822 406.29823 413.29823 419.51423 426.51423 430.01423 434.6762">is detected if the OSC0 external reference falls below a minimum frequency (f</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 54 54)" font-size="14" font-family="TimesLTStd"><tspan y="345.44999" x="476.08815 479.58815 486.58815"> or</tspan><tspan y="361.44999" x=".0041503908">f</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 54)" font-size="10.5" font-family="TimesLTStd"><tspan y="364.24998" x="4.6661608 7.585161 12.835161 17.497162 22.747162 25.666163 30.916163">loc_low</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 54)" font-size="14" font-family="TimesLTStd"><tspan y="361.44999" x="38.49716 41.99716 48.99716 55.21316 62.21316 68.42916 75.42916 82.42916 86.32116 93.32116 100.32116 103.82116 110.82116 117.82116 121.32116 130.65917 137.65917 142.32117 151.65917 161.76717 171.87517 181.98317 190.53717 197.53717 202.19918 206.86118 210.36118 213.86118 221.64517 228.64517 233.30718 236.80718 240.69918 247.69918 253.91518 257.41517 263.63117 269.84718 275.29319 281.5092 285.0092 295.1172 302.1172 308.3332 315.3332 318.8332 328.1712 335.1712 339.8332 349.1712 361.61723 370.1712 377.1712 381.8332 389.7292 396.7292 400.2292 403.7292 409.9452 413.4452 417.3372 424.3372 429.7832 435.22923 438.72923 445.72923 450.3912 453.8912 460.1072 463.9992 470.9992 477.2152 484.2152 487.7152 491.6072"> depending on C2[RANGE0]). For the case when C8[CME1]=1, a loss of clock is</tspan><tspan y="377.44999" x="-.0028381348 6.997162 13.213162 17.105164 23.321164 29.537163 33.429166 39.645166 46.645166 50.145166 54.037168 58.699167 62.199167 66.09116 73.09116 79.30717 82.80717 92.14517 100.69917 110.03717 113.53717 119.753177 126.753177 130.64517 136.86118 141.52318 148.52318 154.73918 158.63118 162.13118 166.79319 173.00919 177.67119 183.88719 188.5492 194.7652 201.7652 207.9812 214.1972 217.6972 222.3592 228.57521 232.46721 236.3592 241.8052 245.3052 252.3052 258.5212 262.4132 269.4132 279.5212 283.0212 289.2372 292.7372 303.6292 307.5212 314.5212 318.4132 329.3052 336.3052 347.1972 350.6972 355.3592 360.02119 366.23719 373.23719 380.23719 386.4532 393.4532 399.6692 406.6692 410.1692 414.83119">detected if the RTC external reference falls below a minimum frequency (f</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 54)" font-size="10.5" font-family="TimesLTStd"><tspan y="380.24998" x="419.49317 422.41218 427.66218 432.32417 437.57417 440.49317 445.74317">loc_low</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 54)" font-size="14" font-family="TimesLTStd"><tspan y="377.44999" x="453.32417 457.98616">).</tspan><tspan y="401.84999" x=".0041503908 10.112151 14.004151 17.896153 21.396153 27.612153 31.504153 38.50415 44.72015 51.72015 55.22015 66.11215 73.11215 80.11215 84.00415 87.89615 94.89615 99.55815 105.00415 108.50415 119.39615 126.39615 131.84215 135.73415 139.23415 146.23415 152.45015 155.95015 162.95015 166.84215 172.28815 178.50415 185.50415 189.39615 195.61215 202.61215 206.11215 213.11215 219.32816 223.99016 230.99016 235.65216 241.86817 245.36817 255.47617 264.03016 271.81416 281.15217 284.65217 291.65217 296.31416 299.81416 309.92216 318.47615 326.26014 339.47615 342.97615 349.97615 356.97615 367.08415 373.30015 377.96214 381.46214 392.35414 399.35414 406.35414 412.57014 418.01615 421.51615 427.73216 432.39414 438.61015 442.11015 448.32615 455.32615 459.21815 465.43415 470.09614 476.31214 483.31214">All clock monitors must be disabled before VLPR or VLPW power modes are entered.</tspan><tspan y="426.24998" x=".0041503908 10.112151 17.112153 24.112153 31.112153 34.612154 41.612154 47.82815 51.720155 57.936155 64.15215 68.04415 71.54415 78.54415 83.206157 86.706157 92.92216 96.42216 100.314159 107.314159 112.760158 118.206157 121.706157 128.70615 133.36815 136.86815 143.08415 146.97615 153.97615 160.19216 167.19216 170.69216 176.90816 183.90816 190.12416 197.12416 201.01616 204.51616 208.01616 211.90816 218.90816 225.12416 228.62416 241.07016 250.40816 260.51615 264.01615 271.01615 277.23216 284.23216 290.44816 295.11015 301.32615 305.21815 311.43415 316.88017 320.38017 326.59617 330.09617 335.54219 342.54219 347.9882 351.8802 358.0962 368.9882 372.4882 377.15019 383.36619 388.8122 395.0282 398.9202 402.4202 406.3122 410.97419 414.47419 418.36619 425.36619 431.58219 435.08219 439.74418 445.96018 451.4062 458.4062 464.6222 470.8382 474.7302 478.6222 485.6222">Upon detect of a loss of clock event, the MCU generates a system reset if the respective</tspan><tspan y="442.24998" x=".0041503908 8.55815 18.666152 28.004153 37.342157 45.896158 49.396158 56.396158 60.28816 64.18016 67.68016 71.57216 77.01816 80.51816 85.96416 92.18016 96.07216 99.57216 103.07216 113.18016 117.07216 124.07216 130.28816 134.95017 145.05817 148.95017 154.39617 160.61217 164.11217 168.00417 175.00417 181.22017 184.72017 197.16617 206.50417 216.61217 220.11217 225.55817 231.77417 235.66617 241.11217 244.61217 248.50417 255.50417 261.72016 265.22016 269.88215 276.09815 281.54417 288.54417 294.76017 300.97618 304.86817 308.76017 315.76017 321.97618 325.47618 334.03016 344.13816 353.47618 361.26017 364.76017 371.76017 375.65217 379.54417 383.04417 389.26017 396.26017 403.26017 406.76017 410.65217 417.65217 423.86817 427.36817 439.81419 449.1522">LOCRE bit is set. Otherwise the MCG sets the respective LOCS bit and the MCG</tspan><tspan y="458.24998" x=".0041503908 7.0041506 13.220151 20.22015 26.43615 31.09815 37.31415 41.206155 47.422155 52.868154 56.368154 62.584154 66.08415 74.63815 84.746158 94.08415 101.86816 105.36816 109.260158 116.260158 120.15215 126.36816 131.03015 135.69216 142.69216 149.69216 153.58415 157.08415 161.74616 167.96216 174.96216 181.96216 188.17816 193.62416 197.51616 201.01616 204.51616 209.17816 216.17816 219.67816 223.57016 230.57016 236.78617 240.28617 246.50217 252.71817 258.16419 264.3802 267.8802 277.9882 284.9882 291.2042 295.86619 302.08219 305.58219 311.7982 315.2982 325.4062 333.1902 342.5282 349.5282 353.0282 356.9202 363.9202 369.3662 374.81224 378.31224 385.31224 389.9742 393.4742 399.69023 403.5822 410.5822 416.79823 423.79823 427.29823 431.19023 436.63624 440.13624 447.13624 453.35224 457.24424 463.46025 469.67625 473.56825 479.78425 486.78425">generates a LOCS interrupt request. In the case where a OSC0 loss of clock is detected,</tspan><tspan y="474.24998" x=".0041503908 3.8961509 10.896151 17.112153 20.612153 28.396153 36.950155 45.504156 49.004156 57.558156 67.66615 77.00415 87.11215 90.61215 96.05815 99.95015 106.16615 110.05815 117.05815 122.50415 126.00415 133.00415 136.89615 140.78815 144.28815 148.18015 153.62615 157.12615 163.34215 167.23415 173.45015 179.66616 184.32816 190.54416 197.54416 201.04416 204.93616 209.59816 213.09816 216.99016 223.99016 230.20616 233.70616 243.81417 251.59816 260.93617 264.43617 270.65217 274.54417 281.54417 287.76017 294.76017 298.26017 302.15217 309.15217 315.36817 319.26017 322.76017 326.65217 332.09819 335.59819 339.49018 346.49018 351.9362 355.8282 359.3282 369.4362 375.6522 381.0982 384.5982 390.04423 396.26023 400.15223 406.36824 412.58424 416.47624 422.69224 429.69224 433.19224 439.40824 444.85426 448.35426 452.24626 459.24626 465.46226 468.96226 476.74626 485.30024">the PLL LOCK status bit is cleared if the OSC clock that is lost was selected as the PLL</tspan><tspan y="490.24998" x=".0041503908 4.6661508 10.882151 15.544151 21.76015 26.422152 32.638154 39.638154 45.854154 52.070154 55.570154 61.78615 65.678157 72.678157 78.89416 85.89416">reference clock.</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 584.7999)" font-size="16" font-family="HelveticaLTStd" font-weight="bold"><tspan y="12.15625" x=".00216 8.898161 17.794163 22.242163 31.138165 35.586168">25.4.5</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 112.65332 584.7999)" font-size="16" font-family="HelveticaLTStd" font-weight="bold"><tspan y="12.15625" x=".00216 13.330161 24.882163 37.330163 41.778165 51.554166 56.002168 64.89817 73.794178 83.570178 88.01817 93.346179 99.570178 108.46618 118.24218 128.01818 136.91417 146.69017 155.58617 164.48217 168.93016 177.82616 182.27416 192.05016 200.94615">MCG Fixed frequency clock</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 54)" font-size="14" font-family="TimesLTStd"><tspan y="567.0499" x="-.00384 8.550159 15.550159 21.76616 25.26616 37.71216 47.05016 57.15816 60.65816 68.44216 72.33416 79.33416 85.55016 92.55016 96.05016 103.83417 108.49617 114.71217 121.71217 128.71218 134.92818 141.92818 148.14418 155.14418 158.64418 167.98218 171.87418 178.87418 185.09018 192.09018 195.59018 200.25218 212.69818 222.03618 232.14418 239.92818 247.71218 257.05018 265.60417 275.71217 280.37416 283.87416 290.87416 295.53614 302.53614 309.53614 313.42814 320.42814 326.64414 332.09016 335.59016 341.80616 345.30616 349.96815 353.86015 360.86015 367.07615 374.07615 377.57615 382.23814 386.90013 393.11613 400.11613 407.11613 413.33213 420.33213 426.54814 433.54814 437.04814 443.26414 447.15614 454.15614 460.37214">The MCG Fixed Frequency Clock (MCGFFCLK) provides a fixed frequency clock</tspan><tspan y="583.0499" x="-.0038299999 5.4421708 12.442171 19.442172 24.104172 30.320172 36.53617 40.03617 44.69817 51.69817 56.36017 59.86017 66.86017 70.75217 77.75217 83.96817 88.63017 92.13017 99.13017 106.13017 110.792179 117.00818 124.00818 127.90018 134.90018 138.40018 145.40018 151.61618 156.27819 160.17018 167.17018 174.17018 180.38619 185.04819 191.26419 195.15619 200.60219 204.49419 207.99419 213.44019 219.65619 225.8722 229.3722 233.26419 240.26419 246.4802 249.9802 256.9802 260.8722 267.8722 274.0882 281.0882 284.5882 291.5882 295.4802 301.6962 308.6962 313.3582 319.5742 330.4662 333.9662 337.4662 346.02018 353.02018 356.91218 362.3582 365.8582 372.0742 375.9662 382.9662 389.1822 396.1822 399.6822 403.5742 409.0202 412.5202 419.5202 424.1822 428.0742 435.0742 441.2902 448.2902 451.7902 458.7902 465.7902 469.2902 475.5062 479.3982 483.2902 490.2902 496.5062">source for other on-chip peripherals; see the block diagram. This clock is driven by either</tspan><tspan y="599.0499" x="-.0038299999 3.8881705 10.88817 17.104172 20.604172 26.050173 29.942173 36.942174 47.050176 50.550176 56.766176 60.658178 67.65817 73.874179 80.874179 84.374179 89.03618 93.69818 100.69818 111.59018 115.09018 118.98218 125.98218 132.19818 135.69818 139.59018 146.59018 150.48218 156.69818 161.36019 168.36019 174.57619 178.46819 181.96819 186.63019 192.84619 197.5082 203.7242 208.3862 214.6022 221.6022 227.8182 234.03421 237.53421 243.75022 247.64221 254.64221 260.85823 267.85823 271.35823 278.35823 284.57423 291.57423 297.79023 302.4522 308.6682 312.5602 319.5602 324.2222 327.7222 334.7222 339.3842 342.8842 346.77619 353.77619 359.9922 363.4922 369.7082 376.7082 380.6002 386.8162 391.47819 398.47819 404.69419 408.58619 412.08619 416.74818 422.96418 427.62617 433.84217 438.50416 444.72016 451.72016 457.93617 464.15217 467.65217 473.86817 477.76017 484.76017 490.97618">the slow clock from the internal reference clock generator or the external reference clock</tspan><tspan y="615.0499" x="-.00378 4.6582205 9.320221 16.32022 27.212224 30.712224 34.604227 41.604227 47.820226 51.320226 60.658227 65.32023 72.32023 77.76623 81.658229 87.87423 91.76623 95.26623 105.37423 110.82023 117.03623 120.92823 124.82023 128.71224 134.92824 138.82024 145.82024 150.48224 153.98224 157.48224 164.48224 168.37424 175.37424 179.26624 186.26624 192.48224 199.48224 202.98224 209.98224 216.98224 220.48224 224.37424 231.37424 237.59024 241.09024 248.87424 257.42823 265.9822 269.4822 274.1442 280.3602 285.0222 291.2382 295.90019 302.11619 309.11619 315.33219 321.5482 325.0482 331.2642 335.1562 342.1562 348.3722 355.3722 358.8722 365.8722 369.7642 376.7642 380.6562 387.6562 393.8722 398.53419 402.03419 405.53419 414.08818 421.08818 427.30418 430.80418 436.25019 443.25019 450.25019 454.91218 461.12818 467.34419 470.84419 477.84419">from the Crystal Oscillator, divided by the FLL reference clock divider. The source of</tspan><tspan y="631.0499" x="-.00378 12.442221 21.780222 31.888222 39.672224 47.456224 56.794225 65.34822 75.45622 78.95622 82.84822 88.29422 91.79422 97.24022 103.45622 107.34822 113.564228 119.78023 123.672229 129.88823 136.88823 140.38823 147.38823 154.38823 157.88823 167.22623 174.22623 178.88823 183.55023 192.88823 201.44223 209.22623 217.01023 221.67223">MCGFFCLK is selected by C1[IREFS].</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 54 18)" font-size="9" font-family="HelveticaLTStd" font-weight="bold"><tspan y="25.87323" x="0 5.499 10.998 16.497 21.501 24.498 27 32.499 37.998 43.002004 45.504 48.006 54.504 59.508005 64.512 69.516 73.017 75.519 81.018 84.015 86.517 92.016">Functional Description</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 734.93869)" font-size="10" font-family="HelveticaLTStd" font-weight="bold"><tspan y="8.59766" x="130.005 137.225 142.785 148.345 151.125 157.795 163.905 170.015 173.345 179.455 185.015 193.905 196.685 199.465 205.025 207.805 215.025 220.58499 223.915 229.47499 233.36499 238.92499 245.03499 250.59499 256.155 258.935 267.26499 272.82499 278.93498 285.04496 290.60496 293.38496 296.16496 298.94496 306.16496 311.72496 317.28495 320.06495 322.84495 328.40495 331.18495 336.74494 342.85493 348.9649 351.7449 357.3049 362.8649 368.4249">K60 Sub-Family Reference Manual, Rev. 2 Jun 2012</tspan></text>
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<text fill="#ff0000" xml:space="preserve" transform="matrix(1 0 0 1 220.32 751.756)" font-size="10" font-family="HelveticaLTStd" font-weight="bold"><tspan y="8.59766" x="58.45 65.12 69.01 74.57 77.35 80.13 89.02 91.799999 97.909999 103.46999 107.35999">Preliminary</tspan></text>
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