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Ryan Malloy 5252d1d73c Add hardware reference docs (A3981, K60, RYS352A) 
Allegro A3981 stepper motor driver: datasheet, KiCad symbols/footprint,
3D model (TSSOP-28). Two per G2 board, SPI-controlled, AUTO microstep.

NXP MK60DN512VLQ10 (Kinetis K60): datasheet and 1300-page reference
manual. Cortex-M4 96MHz MCU running the G2 firmware.

Reyax RYS352A GPS module: datasheet and PAIR command guide.
GPS receiver on the G2 board (used for auto-location/satellite lookup).

All extracted as markdown + page images + vector SVGs for LLM context.
Binary assets (PDFs, PNGs, SVGs, STEP, WRL) stored via git-lfs.
2026-02-14 18:36:42 -07:00

132 lines
25 KiB (Stored with Git LFS)
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Raw Blame History

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<text xml:space="preserve" transform="matrix(1 0 0 1 54 66)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x="0 8.340001 12.510002 20.850003 25.020003 33.360006 37.530008">6.2.3.2</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 114.04346 66)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x="0 10.005001 21.675004 32.505006 36.675008 48.34501 57.51001 61.68001">POR Only</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 54)" font-size="14" font-family="TimesLTStd"><tspan y="48.25" x=".006 8.559999 15.559999 21.776001 25.276001 33.06 43.168004 52.506006 56.006006 66.114009 73.114009 77.006008 84.006008 87.506008 92.16801 98.38401 103.83001 110.04601 113.93801 117.43801 123.654018 129.10002 134.54602 140.76203 145.42403 149.31603 154.76203 158.26203 165.26203 172.26203 175.76203 179.65402 186.65402 192.87003 196.37003 204.15402 214.26203 223.60002 227.10002 231.76203 237.97803 243.42403 249.64003 253.53203 257.03205 262.47807 269.47807 276.47807 281.14006 287.35606 293.57206 297.07206 304.07206 311.07206 314.96406 321.96406 325.46406 328.96406 333.62605 337.51805 341.01805 345.68003 351.89604 357.34205 363.55805 367.45005 372.89607 376.39607 380.28807 387.28807 393.50407 397.00407 404.78807 417.23408 426.57209 430.07209 436.2881 443.2881 450.2881 453.7881 461.57209 468.57209 474.0181 477.9101 484.1261">The POR Only reset asserts on the POR reset source only. It resets the PMC and System</tspan><tspan y="64.25" x=".00601 9.344011 15.560012 22.560013 26.452013 31.898015 35.790018 42.006017 46.668016 50.168016 57.952016 61.844018 65.736019 71.95202">Register File.</tspan><tspan y="88.65" x=".00601 8.56001 15.56001 21.77601 25.27601 33.060014 43.168016 52.506017 56.006017 66.11401 73.11401 77.00601 84.00601 87.50601 92.168018 98.38402 103.83002 110.04602 113.93802 117.43802 123.65402 127.54602 132.99202 139.99202 143.49202 149.70803 155.92403 162.92403 168.37003 174.58603 180.03203 183.53203 189.74803 193.64003 197.53203 201.03203 208.03203 211.92403 218.92403 225.14003 229.80204 233.30204 237.96404 244.18004 249.62604 255.84204 259.73405 263.23405 267.12605 274.12605 281.12605 287.34205 292.78807 296.28807 300.95005 307.16606 314.16606 320.38206 326.59806 333.59806 337.49006 340.99006 351.09806 360.43608 370.54408 379.09806 382.59806 390.38206 400.49006 409.82807 414.49006 417.99006 421.88206 428.88206 432.38206 439.38206 445.59806 451.81407 458.81407 463.47605">The POR Only reset also causes all other reset types (except VBAT POR) to occur.</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 183.20001)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x="-.00401 8.335991 12.505991 20.845993 25.015994 33.355997 37.525999">6.2.3.3</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 114.04346 183.20001)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x="-.00402 10.825981 19.990983 24.160983 33.32598 37.495985 47.500986 59.170988 70.000988 74.17098 83.33598 92.500988 97.49599 101.665988 111.67099 120.83599 130.00099">Chip POR not VLLS</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 54)" font-size="14" font-family="TimesLTStd"><tspan y="165.45001" x=".00599 8.55999 15.55999 21.77599 25.27599 34.61399 41.61399 45.505994 52.505994 56.005994 63.789995 73.897998 83.23599 86.73599 93.73599 100.73599 104.62799 108.12799 118.23599 126.78999 135.344 143.12799 146.62799 151.29 157.506 162.952 169.168 173.06 176.56 182.776 188.222 193.668 199.884 204.546 208.438 213.884 217.384 224.384 231.384 234.884 242.668 252.776 262.114 265.614 271.83003 278.83003 285.83003 289.33003 297.884 307.992 318.1 321.6 326.262 332.478 337.924 344.14 348.032 351.532 356.97804 363.97804 370.97804 375.64 381.85603 388.07203 393.51805 397.01805 400.51805 405.18003 409.07203 412.57203 417.234 423.45 428.89604 435.11204 439.00404 444.45005 447.95005 454.95005 461.16606 465.82804 469.72004 475.16606 478.66606 485.66606">The Chip POR not VLLS reset asserts on POR and LVD reset sources. It resets parts of</tspan><tspan y="181.45001" x=".0059599999 3.8979605 10.897961 17.11396 20.61396 28.39796 40.843965 50.181966 53.681966 59.897966 66.897968 73.897968 77.397968 85.18197 89.84397 102.28997 105.78997 109.28997 113.95197 117.84397 121.34397 127.559978 131.45198 136.89798 143.89798 147.39798 152.05998 158.27599 163.72199 169.93799 173.82999 179.27599 182.77599 186.66799 193.66799 199.88399 203.38399 211.93799 219.72199 228.27599 240.72199 250.05998">the SMC and SIM. It also resets the LPTMR.</tspan><tspan y="205.85" x=".00599 8.55999 15.55999 21.77599 25.27599 34.61399 41.61399 45.505994 52.505994 56.005994 63.789995 73.897998 83.23599 86.73599 93.73599 100.73599 104.62799 108.12799 118.23599 126.78999 135.344 143.12799 146.62799 151.29 157.506 162.952 169.168 173.06 176.56 182.776 186.668 192.114 199.114 202.614 208.83 215.046 222.046 227.492 233.70801 239.154 242.654 246.546 253.546 259.762 265.208 271.424 274.924 279.586 285.802 291.24803 297.46403 301.35603 306.80204 310.30204 314.19404 321.19404 324.69404 331.69404 337.91004 344.12605 351.12605 355.78804 359.68003 363.18003 372.51805 379.51805 383.41004 390.41004 393.91004 401.69404 411.80204 421.14006 424.64006 428.14006 437.47807 444.47807 448.37007 455.37007 458.87007 468.20808 474.42408 479.8701 486.0861">The Chip POR not VLLS reset also causes these resets to occur: Chip POR, Chip Reset</tspan><tspan y="221.85" x=".0059599999 7.00596 14.00596 17.89796 21.39796 31.505963 40.059965 48.613965 56.397966 59.897966 63.397966 69.61397 76.61397 83.61397 87.11397 96.451969 103.451969 107.34396 114.34396 117.84396 127.18196 133.39797 138.84397 145.05997 148.95197 152.45197 157.11397 161.00597 168.00597 174.22197 178.11397 185.11397 192.11397 196.00597 203.00597 210.00597 213.50597 222.05997 228.27597 232.93798 236.82997 243.82997 247.32997 256.66798 263.66798 267.55998 274.55998 278.05998 287.39799 293.61399 299.06 305.276 309.168 313.83">not VLLS, and Chip Reset (including Early Chip Reset).</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 316.4)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x=".00495 8.344951 12.514952 20.854954 25.024954 33.364957 37.534959">6.2.3.4</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 114.04346 316.4)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x=".00495 10.83495 19.99995 24.16995 33.33495 37.50495 47.509954 59.179956">Chip POR</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 54)" font-size="14" font-family="TimesLTStd"><tspan y="298.65" x="-.00405 8.54995 15.54995 21.76595 25.26595 34.60395 41.60395 45.495954 52.495954 55.995954 63.779954 73.887958 83.22595 86.72595 92.941959 98.387958 103.833957 110.04996 114.71196 118.60396 124.04996 127.54996 134.54996 141.54996 145.04996 152.83396 162.94196 172.27996 175.77996 179.27996 187.83396 197.94196 208.04996 211.54996 215.04996 221.26596 228.26596 235.26596 238.76596 248.87397 257.42796 265.98194 273.76594 277.26594 290.48194 296.69795 303.69795 309.91395 316.91395 323.91395 327.41395 332.07594 338.29194 343.73796 349.95396 353.84596 357.34596 362.79197 369.79197 376.79197 381.45396 387.66996 393.88597 399.33198 402.83198 406.33198 410.99397 414.88597 418.38597 423.04795 429.26396 434.70997 440.92597 444.81797 450.26399 453.76399 457.65599 464.65599">The Chip POR asserts on POR, LVD, and VLLS Wakeup reset sources. It resets the</tspan><tspan y="314.65" x="-.00405 9.333951 15.549952 20.995953 27.211953 31.103953 34.60395 42.38795 46.279954 53.279954 56.779954 64.56396 68.455959 72.34795 76.23995 82.455959 87.11796 90.61796 95.27996 101.495967 108.495967 112.38796 117.83396 121.72596 127.94196 132.60396 138.04996 141.54996 147.76596 154.76596 161.76596 165.26596 172.26596 178.48197 183.14397 187.03597 192.48197 195.98197 202.98197 207.64397 211.14397 215.03597 222.03597 228.25197 231.75197 239.53597 244.19797 256.64399 260.14399 266.36 273.36 280.36 283.86 296.306 305.644 315.752">Reset Pin Filter registers and parts of the SIM and MCG.</tspan><tspan y="339.05" x="-.00405 8.54995 15.54995 21.76595 25.26595 34.60395 41.60395 45.495954 52.495954 55.995954 63.779954 73.887958 83.22595 86.72595 92.941959 96.833957 102.27995 109.27995 112.77995 118.99596 125.21196 132.21196 137.65796 143.87397 149.31996 152.81996 156.71196 163.71196 169.92797 173.42797 182.76596 189.76596 193.65796 200.65796 204.15796 213.49596 219.71196 225.15796 231.37397 235.26596 238.76596 243.42797 247.31996 254.31996 260.53596 264.42796 271.42796 278.42796 282.31996 289.31996 296.31996 299.81996 308.37394 314.58995 319.25193 323.14393 330.14393 333.64393 342.98194 349.98194 353.87394 360.87394 364.37394 373.71195 379.92796 385.37397 391.58998 395.48197 400.14396 403.64396 407.53596 414.53596 418.03596 425.03596 431.25196 437.46797 444.46797 449.12995">The Chip POR also causes the Chip Reset (including Early Chip Reset) to occur.</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 433.59999)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x=".00492 8.344921 12.514921 20.854924 25.024924 33.364927 37.534929">6.2.3.5</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 114.04346 433.59999)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x=".00492 10.834921 19.99992 24.16992 33.33492 37.50492 48.334924 56.674924 65.01492 73.35493 78.34993 82.51993 91.68493 100.84993 105.84493 110.01493 120.01993 129.18492 138.34992">Chip Reset not VLLS</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 54)" font-size="14" font-family="TimesLTStd"><tspan y="415.84999" x="-.00308 8.55092 15.55092 21.76692 25.26692 34.60492 41.60492 45.49692 52.49692 55.99692 65.33492 71.55093 76.996929 83.21293 87.10493 90.60493 97.60493 104.60493 108.496929 111.996929 122.10493 130.65892 139.21292 146.99692 150.49692 155.15892 161.37493 166.82093 173.03693 176.92893 180.42893 186.64493 192.09093 197.53693 203.75293 208.41493 212.30693 217.75293 221.25293 228.25293 235.25293 238.75293 244.96894 248.86093 252.75293 256.25294 260.91493 267.13093 272.57695 278.79295 282.68495 286.18495 291.63096 298.63096 305.63096 310.29295 316.50895 322.72496 328.17097 331.67097 337.88697 344.88697 351.10298 357.31898 364.31898 368.21098 371.71098 377.92698 381.42698 391.53498 400.08897 408.64295 416.42695 419.92695 433.14295 439.35896 446.35896 452.57496 459.57496 466.57496 470.07496 473.96696 480.96696 487.18296">The Chip Reset not VLLS reset asserts on all reset sources except a VLLS Wakeup that</tspan><tspan y="431.84999" x="-.0030699999 6.99693 13.99693 20.21293 25.658932 29.158932 36.15893 43.15893 47.050935 50.550935 57.550935 63.766935 69.98293 76.98293 81.644939 85.144939 92.144939 96.036937 102.25294 105.75294 109.644939 116.644939 122.86094">does not occur via the </tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 54)" font-size="14" font-family="TimesLTStd"><tspan y="431.84999" x="126.36094 135.69895 144.25295 152.03694 160.59095 169.14495 172.64495 179.64495 183.53694 190.53694 194.03694 197.53694 202.19895 206.09095 209.59095 214.25295 220.46895 225.91495 232.13095 236.02295 241.46895 244.96895 251.96895 258.18495 262.84693 266.73893 272.18495 275.68495 282.68495 287.34693 290.84693 294.73893 301.73893 307.95494 311.45494 319.23893 331.68495 341.02296 344.52296 348.02296 356.57695 365.13093 378.34693 388.45494 391.95494 395.45494 401.67094 408.67094 415.67094 419.17094 426.17094 430.06294 437.06294 443.27894 447.94093 451.44093 462.33293 469.33293 476.33293 483.33293 487.2249 493.44093">RESET pin. It resets parts of the SMC, LLWU, and other modules</tspan><tspan y="447.84999" x="-.0030593873 3.888941 10.888941 17.104943 20.996943 24.496943 29.158944 35.374944 46.266946 52.482946 56.374948 63.374948 66.87495 73.87495 80.87495 90.98295 97.19895 101.860958 108.07696 115.07696 118.57696 125.57696 132.57697 137.23897 141.13097 148.13097 155.13097 158.63097 168.73897 177.29297 185.84697 193.63097 197.13097 208.02297 215.02297 222.02297 228.23897">that remain powered during VLLS mode.</tspan><tspan y="472.24998" x="-.0030593873 8.5509409 15.5509409 21.766942 25.266942 34.604944 41.604944 45.496946 52.496946 55.996946 65.334949 71.55095 76.99695 83.21295 87.10495 90.60495 97.60495 104.60495 108.49695 111.99695 122.10495 130.65895 139.21295 146.99695 150.49695 155.15895 161.37496 166.82096 173.03696 176.92896 180.42896 186.64496 190.53696 195.98296 202.98296 206.48296 212.69896 218.91497 225.91497 231.36096 237.57697 243.02297 246.52297 250.41497 257.41499 263.63099 267.13099 276.469 283.469 287.361 294.361 297.861 307.199 313.415 318.86103 325.07704 328.96903 332.46903 337.131 341.023 348.023 354.239 358.131 365.131 372.131 376.023 383.023 390.023 393.523 402.077 408.293 412.955 416.847 423.847 427.347 436.685 443.685 447.577 454.577 458.077 467.415 473.631 479.07704 485.29304 489.18504">The Chip Reset not VLLS reset also causes the Chip Reset (including Early Chip Reset)</tspan><tspan y="488.24998" x="-.0030093874 3.888991 10.888991 14.388991 21.388993 27.604992 33.82099 40.82099 45.48299">to occur.</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 582.7999)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x="-.00701 8.332991 12.502991 20.84299 25.01299 33.352994 37.522996">6.2.3.6</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 54)" font-size="14" font-family="TimesLTStd"><tspan y="565.0499" x=".002 8.556 15.556 21.772 25.272 33.826 40.042 44.704 48.596 55.596 59.096 68.434009 75.434009 79.326007 86.326007 89.826007 99.164 105.380008 110.826007 117.04201 120.934009 124.434009 130.65001 136.09601 141.542 147.75801 152.42002 156.31201 161.75801 165.25801 172.25801 179.25801 182.75801 188.97402 192.86602 196.75801 200.25801 204.92002 211.13602 216.58202 222.79802 226.69002 230.19002 235.63602 242.63602 249.63602 254.29802 260.514 266.73 272.17604 275.67604 279.17604 283.838 287.73 291.23 295.892 302.108 307.55403 313.77003 317.66203 323.10804 326.60804 333.60804 340.60804 344.50004 351.50004 355.00004 358.89204 365.89204 372.10804 375.60804 380.27003 384.16203 390.37803 395.82405 402.82405 406.32405 417.21604 423.43205 434.32405 441.32405 445.98603 452.98603 456.48603 467.37803 474.37803 481.37803 488.37803 492.27003 498.48603">The Early Chip Reset asserts on all reset sources. It resets only the flash memory module.</tspan><tspan y="581.0499" x=".00203 4.66403 8.55603 12.05603 19.05603 25.27203 32.27203 38.48803 42.38003 48.59603 54.04203 57.54203 64.54203 70.75803 75.42004 82.42004 87.08204 93.29804 96.79804 101.460048 105.35204 111.56805 117.014049 124.014049 127.514049 138.40605 144.62206 155.51406 162.51406 167.17606 174.17606 177.67606 181.56806 188.56806 192.46006 196.35205 200.24405 206.46006 210.35205 214.24405 220.46006 226.67606 230.56806 234.46006 241.46006 248.46006 251.96006 258.96006 265.17607 272.17607 276.06806 283.06806 288.51408 292.01408 296.67607 302.38807 308.60408 314.82008 319.48207 323.37406 327.26606 333.48207 338.14405 343.85606 347.35606 351.24806 358.24806 364.46406 371.46406 374.96406 385.07206 392.07206 398.28807 405.28807 408.78807 412.68006 419.68006 425.89607 429.39607 438.73408 445.73408 449.62608 456.62608 460.12608 469.46409 475.68009 481.1261 487.3421">It negates before flash memory initialization begins ("earlier" than when the Chip Reset</tspan><tspan y="597.0499" x=".00203 7.00203 13.218031 20.21803 26.434033 30.326033 36.542036 41.988035 46.650033">negates).</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 18)" font-size="9" font-family="HelveticaLTStd" font-weight="bold"><tspan y="26.01031" x="393.98399 400.48197 405.98097 410.98497 416.48396 419.48097 424.48497 427.98597 430.48799 435.49198 437.994 444.49198 449.49598 454.49998 459.50398 462.50099 465.003 470.007 475.50599 481.00498 483.507 490.00498 495.50398 501.00297">Chapter 6 Reset and Boot</tspan></text>
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