Allegro A3981 stepper motor driver: datasheet, KiCad symbols/footprint, 3D model (TSSOP-28). Two per G2 board, SPI-controlled, AUTO microstep. NXP MK60DN512VLQ10 (Kinetis K60): datasheet and 1300-page reference manual. Cortex-M4 96MHz MCU running the G2 firmware. Reyax RYS352A GPS module: datasheet and PAIR command guide. GPS receiver on the G2 board (used for auto-location/satellite lookup). All extracted as markdown + page images + vector SVGs for LLM context. Binary assets (PDFs, PNGs, SVGs, STEP, WRL) stored via git-lfs.
135 lines
32 KiB (Stored with Git LFS)
XML
135 lines
32 KiB (Stored with Git LFS)
XML
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<text xml:space="preserve" transform="matrix(1 0 0 1 54 54)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x="0 8.340001 12.510002 20.850003 25.020003 33.360006 37.530008">6.2.2.2</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 114.04346 54)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x="0 9.165 18.33 30 34.995 43.335 52.5 56.670003 61.665 70.005008 79.170009 87.51001 91.68001 100.84501 109.18501 114.180019 122.52002 130.86002 135.85501 140.02501 145.02 154.185 164.19 175.02">Low-voltage detect (LVD)</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 54)" font-size="14" font-family="TimesLTStd"><tspan y="36.25" x=".00301 8.55701 15.55701 21.77301 25.27301 31.48901 38.48901 42.381013 49.381013 52.881013 56.773015 63.773015 69.98901 73.88101 80.88101 87.88101 94.097019 99.543018 103.043018 109.25902 112.75902 118.20502 125.20502 130.65102 134.54302 140.75902 151.65102 155.15102 159.81302 166.81302 171.47502 174.97502 185.86702 192.08303 199.08303 205.29903 212.29903 216.19103 223.19103 230.19103 233.69103 237.58303 244.58303 254.69103 258.19105 265.19105 272.19105 276.08305 279.97505 286.19105 293.19105 299.40705 302.90705 309.12306 316.12306 323.12306 330.12306 334.01506 337.90705 341.79905 348.79905 355.79905 361.24507 364.74507 368.63706 375.63706 379.13706 386.13706 390.79905 397.79905 401.69105 407.90705 414.12306 418.01506 421.51506 432.40705 438.62306 449.51506 456.51506 461.17704">The chip includes a system for managing low voltage conditions to protect memory</tspan><tspan y="52.25" x=".00306 6.2190606 13.219061 20.21906 24.111062 30.32706 37.32706 41.219064 46.665063 50.165063 56.38106 63.38106 70.38106 73.88106 80.09706 87.09706 94.09706 97.98906 102.65106 109.65106 113.54306 117.04306 129.48906 138.82706 148.93506 152.43506 157.88106 164.88106 170.32706 174.21906 180.43506 191.32706 194.82706 200.27306 204.16506 210.38106 214.27306 220.48906 225.93506 229.43506 236.43506 243.43506 248.09706 251.98906 258.98908 265.98908 269.48908 274.9351 281.9351 288.9351 295.9351 299.8271 306.8271 310.3271 317.3271 324.3271 328.2191 332.11109 338.3271 345.3271 351.5431 355.0431 362.0431 368.2591 372.92109 376.81309 383.02909 386.92109 390.81309 397.81309 404.81309 410.2591 413.7591 417.2591 425.81309 432.81309 439.02909 442.52909 447.9751 454.9751 460.4211 464.3131 470.5291">contents and control MCU system states during supply voltage variations. The system</tspan><tspan y="68.25" x=".00306 6.2190606 13.219061 20.21906 25.665062 29.557063 35.003065 38.895067 44.341066 47.841066 54.841066 59.503065 63.003065 69.21906 72.71906 79.71906 86.71906 96.827068 103.04307 107.70507 112.36707 119.36707 126.36707 129.86707 134.52907 140.74507 146.19107 152.40708 156.29907 159.79907 164.46108 172.24507 182.35308 191.69107 196.35308 199.85308 206.06908 209.96108 214.62308 220.83908 227.83908 231.73108 235.62308 239.12308 245.33908 252.33908 259.33909 262.83909 269.05509 276.05509 279.55509 288.10908 298.21708 308.32508 311.82508 318.04109 321.93309 326.59507 332.81108 339.81108 343.70307 347.59507 351.09507 361.20307 365.09507 368.98707 375.98707 379.48707 385.70307 389.20307 396.20307 401.64909 407.86509 412.52708 417.18907 422.63508 428.85108 432.74308 438.95909 445.17509 449.06709 455.28309 462.28309 466.17509 472.39109 475.89109 479.78309 484.44508 488.33708">consists of a power-on reset (POR) circuit and an LVD circuit with a user-selectable trip</tspan><tspan y="84.25" x=".00306 7.00306 14.003059 17.89506 21.78706 28.00306 35.00306 41.21906 44.71906 48.21906 56.77306 63.77306 69.98906 73.48906 82.04306 92.15106 102.25906 105.75906 111.20506 118.20506 123.65106 127.54306 133.75907 144.65106 148.15106 152.04306 157.48906 160.98906 167.20507 171.09706 181.20507 187.42107 194.42107 199.86707 203.36707 209.58307 216.58307 222.79907 229.79907 233.69107 239.90708 246.90708 250.40708 254.29907 261.29908 264.79908 271.79908 278.79908 283.46107 294.35307 300.56907 304.46107 307.96107 312.62306 319.62306 326.62306 330.12306 333.62306 343.73106 349.94706 353.83906 357.73106 361.23106 364.73106 371.73106 376.39305 379.89305 385.33906 389.23106 396.23106 403.23106 406.73106 417.62306 424.62306 431.62306 437.83906 441.33906 444.83906 453.39305 460.39305 466.60905 470.10905 478.66304 488.77104">voltage. The LVD system is always enabled in normal run, wait, or stop mode. The LVD</tspan><tspan y="100.25" x=".00306 5.4490606 12.44906 17.895062 21.787062 28.003064 38.895067 42.395067 46.287069 51.733068 55.233068 62.233068 66.12507 71.57107 77.78707 84.78707 88.67907 94.89507 101.89507 105.39507 115.503078 122.503078 128.71907 135.71907 139.21907 145.43508 152.43508 156.32707 162.54308 167.20508 171.09708 178.09708 185.09708 188.59708 198.70508 207.25908 215.04308 222.04308 225.54308 229.04308 237.59708 246.15108 253.93508 257.43507 260.93507 267.93507 272.59706 276.09706 286.20506 294.75904 303.31303 311.09703 318.09703 321.59703 332.489 339.489 346.489 352.70503 358.15104">system is disabled when entering VLPx, LLS, or VLLSx modes.</tspan><tspan y="124.65" x=".00306 8.55706 15.55706 21.77306 25.27306 33.82706 43.935064 54.043066 57.543066 63.759065 69.97507 76.97507 80.47507 87.47507 93.69107 97.19107 103.407077 110.407077 117.407077 122.06908 125.961078 132.96108 139.96108 144.62308 150.83908 157.83908 161.33908 165.23108 172.23108 175.73108 182.73108 188.94709 195.94709 202.16309 206.82509 213.04109 216.93309 223.1491 226.6491 232.8651 236.3651 241.0271 247.2431 252.6891 258.9051 262.7971 266.2971 273.2971 280.2971 287.2971 294.2971 297.7971 304.7971 311.0131 314.9051 321.1211 327.3371 331.2291 335.1211 342.1211 349.1211 352.6211 359.6211 364.28309 367.78309 373.99909 377.49909 381.39109 388.39109 398.49909 401.99909 408.99909 415.99909 419.89109 423.78309 429.99909 436.99909 443.2151 446.7151 452.9311 459.9311 466.9311 473.9311 477.8231 481.7151 485.6071 492.6071">The LVD can be configured to generate a reset upon detection of a low voltage condition</tspan><tspan y="140.65001" x=".00306 7.00306 14.003059 17.50306 22.94906 29.165062 33.057065 36.949068 40.84107 47.84107 54.84107 58.34107 62.23307 69.23307 75.44907 78.94907 86.73308 99.17908 108.517078 111.03707 116.48307 119.98307 128.53707 138.64507 148.75307 156.53707 165.87506 172.87506 177.53707 186.09107 196.19907 206.30707 215.64507 224.19907 228.86107 232.36107 239.36107 243.25307 247.14507 250.64507 254.53707 261.53706 265.03706 272.03706 275.53706 279.03706 287.59104 294.59104 300.80705 304.30705 308.19905 315.19905 325.30705 328.80705 335.80705 342.80705 346.69905 350.59104 356.80705 363.80705 370.02305 373.52305 380.52305 386.73905 390.63105 396.84706 403.06306 406.95506 410.84706 417.84706 424.84706 428.34706 432.23905 439.23905 443.90104 450.11705 455.56306 462.56306 469.56306 473.45506 480.45506 483.95506 487.84706">by setting the PMC's LVDSC1[LVDRE] bit to 1. The low voltage detection threshold is</tspan><tspan y="156.65001" x=".00306 7.00306 13.219061 17.111062 23.32706 27.989062 38.88106 42.773065 49.773065 55.989065 62.989065 66.48906 73.48906 80.48906 83.98906 87.88106 94.88106 101.09706 104.59706 112.381069 124.827068 134.16507 136.68508 142.13108 145.63108 154.18508 164.29308 174.40108 182.18508 191.52307 198.52307 203.18508 211.73908 221.84708 231.95508 242.06308 246.72509 250.22509 254.88709 258.77909 264.9951 268.8871 275.8871 279.3871 282.8871 292.9951 297.65708 301.54908 307.76509 312.42707 315.92707 322.14308 329.14308 332.64308 341.19706 351.30506 361.41307 364.91307 369.57505 375.79106 381.23707 387.45307 391.34507 394.84507 401.84507 408.06108 413.50709 417.00709 424.00709 430.22309 436.4391 443.4391 448.10108 452.76307 458.97908 465.97908 469.47908 472.97908 476.87107 483.87107">determined by the PMC's LVDSC1[LVDV] field. After an LVD reset has occurred, the</tspan><tspan y="172.65001" x=".00306 8.55706 18.665062 28.773064 32.273065 37.719064 44.719064 50.165063 54.057065 60.273065 71.16506 74.66506 81.66506 88.66506 92.55706 99.55706 105.00306 108.50306 112.39506 119.39506 125.61106 129.11106 141.55706 150.89505 161.00305 164.50305 168.39505 175.39505 178.89505 183.55706 189.77306 195.21906 201.43506 205.32706 208.82706 215.82706 222.82706 226.71906 230.61106 234.50305 238.00305 241.89505 248.89505 255.11106 258.61106 264.05708 271.05708 278.05708 285.05708 288.94908 295.94908 299.44908 306.44908 313.44908 317.34107 321.23307 327.44908 334.44908 340.66508 344.16508 351.16508 357.38108 362.8271 366.3271 370.98908 374.88108 380.3271 386.5431 393.5431 397.0431 403.2591 410.2591 417.2591 424.2591 430.4751 433.9751 437.8671 444.8671 451.0831 454.5831 458.4751 465.4751">LVD system holds the MCU in reset until the supply voltage has risen above the low</tspan><tspan y="188.65001" x=".00306 7.00306 14.003059 17.89506 21.78706 28.00306 35.00306 41.21906 44.71906 51.71906 57.93506 61.82706 68.04306 74.25906 78.15106 82.04306 89.04306 96.04306 99.54306 103.43506 110.43506 115.09706 121.313068 126.75906 133.75907 140.75907 144.65106 151.65106 155.15106 158.65106 167.20507 174.20507 180.42107 183.92107 193.25907 202.59706 215.04306 217.56307 223.00907 226.50907 234.29306 243.63106 251.41506 258.41505 263.07704 271.631 281.739 291.84703 296.509 300.009 307.009 310.901 314.793 318.293 322.185 327.631 331.131 336.57704 342.79304 346.68504 350.18504 354.84703 361.84703 365.739 369.631 376.631 386.739 390.631 397.631 404.631 408.131 414.34703 418.239 422.131 429.131 435.34703 440.009 443.509 449.725 456.725 460.225 468.779 478.887">voltage detection threshold. The RCM's SRS0[LVD] bit is set following either an LVD</tspan><tspan y="204.65001" x=".00306 4.66506 10.881061 16.32706 22.54306 26.43506 29.93506 36.93506 41.597059 45.097059 52.881059 62.98906 72.32706">reset or POR.</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 299.2)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x=".00205 8.3420519 12.512053 20.852055 25.022055 33.362058 37.53206">6.2.2.3</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 114.04346 299.2)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x=".00205 10.832051 19.997052 33.332056 42.497056 51.662057 56.657056 64.997058 70.832057 75.00205 84.16705 93.332057 101.67206 107.50706 115.84706 120.842067 125.01206 134.17707 143.34206 147.51206 156.67705 162.51206 171.67705 180.84204 189.18204 195.01705 199.18704 207.52704 211.69704 216.69203 227.52204 239.19203 249.19704 254.19203 258.36204 270.03205 278.37205 283.36705 291.70704 300.87205 310.03706 319.20207 328.36708 332.53709 337.53208 341.7021 355.03709 363.37709">Computer operating properly (COP) watchdog timer</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 54.000017)" font-size="14" font-family="TimesLTStd"><tspan y="281.45" x=".00405 8.55805 15.55805 21.774052 25.274052 31.490052 38.49005 49.382055 56.382055 63.382055 67.274059 73.49006 78.15206 81.65206 88.65206 95.65206 101.868068 106.53007 112.74607 116.63807 120.53007 127.53007 134.53006 138.03006 145.03006 149.69207 156.69207 163.69207 169.90807 174.57007 178.46207 185.46207 188.96207 193.62407 202.96207 213.07007 220.85407 225.51607 229.01607 239.12407 245.34008 249.23207 255.44808 262.44807 269.44807 276.44807 283.44807 286.94807 290.84007 294.73207 305.62406 311.84007 316.50205 320.00205 324.66404 337.88005 347.98805 358.09605 368.20405 372.86604 376.36604 387.25804 394.25804 401.25804 405.15003 409.04203 416.04203 420.704 426.15003 429.65003 433.54203 440.54203 446.75804 450.25804 457.25804 464.25804 470.47404 475.13603 481.35203 485.24403 489.13603 496.13603">The computer operating properly (COP) watchdog timer (WDOG) monitors the operation</tspan><tspan y="297.45" x=".00405 7.00405 11.66605 15.16605 19.05805 26.05805 32.27405 35.77405 41.22005 48.22005 53.66605 57.558053 63.77405 74.66605 78.16605 85.16605 92.16605 95.66605 101.88206 108.88206 115.88206 122.09806 128.31406 132.20606 136.09806 143.09806 150.09806 153.59806 160.59806 166.81406 171.47606 175.36806 182.36806 189.36806 193.26006 199.47606 202.97606 209.19207 216.19207 227.08406 237.97606 244.97606 251.97606 255.86806 262.08406 268.30006 272.19206 276.08406 283.08406 290.08406 293.58406 298.24604 302.90803 309.90803 320.80003 324.30003 328.19203 335.19203 341.40803 344.90803 350.35404 357.35404 362.01603 365.90803 376.01603 382.23204 386.894 393.11003 396.61003 400.11003 408.664 415.664 419.556">of the system by expecting periodic communication from the software. This</tspan><tspan y="313.45" x=".00405 6.2200505 13.220051 24.112053 35.004056 42.004056 49.004056 52.896059 59.112058 65.32806 69.220058 73.11205 80.11205 87.11205 90.61205 94.50405 99.95005 103.45005 110.45005 116.66605 123.66605 129.88205 134.54405 140.76006 144.65206 148.54405 155.54405 159.04405 166.04405 173.04405 180.04405 190.15206 197.15206 200.65206 206.86806 212.31406 215.81406 221.26006 227.47606 232.13806 239.13806 243.03006 249.24607 253.13806 260.13807 267.13807 270.63807 275.30006 282.30006 286.96205 290.46205 295.12403 301.34004 306.002 310.664 316.88 322.32603 329.32603 333.21803 340.21803 347.21803 351.88 355.38 359.272 366.272 372.488 375.988 385.32603 395.43403 403.21803 406.71803 416.82603 423.04203 426.93403 433.15003 440.15003 447.15003 454.15003 461.15003 464.65003 468.15003 472.812 477.474 480.974 484.866 491.866 495.758">communication is generally known as servicing (or refreshing) the COP watchdog. If this</tspan><tspan y="329.45" x=".0041 7.0041 13.2201 17.882102 21.774102 28.774102 35.7741 39.666105 45.882104 49.382104 54.0441 60.2601 64.922107 69.58411 75.80011 81.24611 88.24611 92.13811 99.13811 106.13811 109.63811 116.63811 123.63811 129.85411 135.30011 138.80011 145.80011 152.80011 156.69211 160.19211 167.19211 173.40811 179.62412 186.62412 191.28612 194.78612 198.28612 202.17812 209.17812 215.39412 218.89412 229.00212 235.21813 239.11013 245.32613 252.32613 259.3261 266.3261 273.3261 276.8261 280.7181 286.16413 291.61015 298.61015 304.82615 310.27217 313.77217 319.98817 323.48817 328.93418 335.93418 341.3802 345.2722 351.4882 362.3802 365.8802 370.54219 376.75819 382.2042 388.4202 392.3122 395.8122 399.3122 407.86619 414.86619 421.08219 424.58219 433.9202 444.0282 451.8122 455.3122 459.97419 466.1902 471.6362 477.8522">periodic refreshing does not occur, the watchdog issues a system reset. The COP reset</tspan><tspan y="345.45" x=".0041 6.2201006 12.436101 19.4361 24.882102 31.098103 36.5441 40.0441 43.936105 50.936105 57.152105 60.652105 69.990108 79.32811 91.77411 94.294109 99.740108 103.240108 111.02411 120.36211 128.1461 135.1461 139.8081 153.02411 163.13211 173.24011 183.34812 188.01012 191.51012 198.51012 202.40212 206.29412 209.79412 213.68611 220.68611 224.18611 229.63211 235.84812 239.74011">causes the RCM's SRS0[WDOG] bit to set.</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 440)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x=".00009 8.340091 12.510092 20.850094 25.020094 33.360097 37.530099">6.2.2.4</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 114.04346 440)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x=".00008 9.16508 18.33008 30.00008 34.170083 38.340085 46.680086 55.020086 63.360086 71.70009 80.86509 89.20509 93.37509 105.04509 113.38509 121.7251 130.0651 139.23009 148.39508 152.56508 157.56008 166.72507 175.89006 190.05007 200.88007">Low leakage wakeup (LLWU)</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 54)" font-size="14" font-family="TimesLTStd"><tspan y="422.25" x=".0051 8.5591 15.5591 21.7751 25.2751 33.8291 42.383104 55.599103 65.7071 69.2071 80.0991 87.0991 94.0991 101.0991 104.9911 111.2071 114.7071 121.7071 126.3691 133.36911 140.36911 144.26111 151.26111 157.47711 162.92311 166.42311 170.31511 177.31511 183.53112 187.03112 197.92311 204.13912 210.35512 217.35512 222.80112 226.30112 230.96312 237.96312 242.62512 246.12512 252.34113 255.84113 262.84114 269.84114 280.73313 287.73313 293.94914 298.6111 302.1111 309.1111 313.7731 317.2731 323.4891 330.4891 334.3811 340.5971 345.2591 352.2591 358.4751 362.3671 365.8671 372.8671 376.7591 383.7591 389.2051 392.7051 396.2051 400.0971 407.0971 413.3131">The LLWU module provides the means for a number of external pins, the </tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 18)" font-size="9" font-family="HelveticaLTStd" font-weight="bold"><tspan y="25.87323" x="0 6.4980008 11.502001 16.506 21.510003">Reset</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 734.93869)" font-size="10" font-family="HelveticaLTStd" font-weight="bold"><tspan y="8.59766" x="130.007 137.227 142.787 148.347 151.127 157.797 163.907 170.017 173.347 179.457 185.017 193.907 196.687 199.467 205.027 207.80699 215.027 220.58699 223.91699 229.47699 233.36699 238.92699 245.03699 250.59699 256.15699 258.93699 267.26698 272.82698 278.93696 285.04695 290.60694 293.38694 296.16694 298.94694 306.16694 311.72694 317.28694 320.06694 322.84693 328.40693 331.18693 336.74693 342.8569 348.9669 351.7469 357.3069 362.86689 368.42689">K60 Sub-Family Reference Manual, Rev. 2 Jun 2012</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 53.999998 751.756)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x=".00102 5.0050208 10.009022">202</tspan></text>
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<text fill="#ff0000" xml:space="preserve" transform="matrix(1 0 0 1 220.32 751.756)" font-size="10" font-family="HelveticaLTStd" font-weight="bold"><tspan y="8.59766" x="58.45 65.12 69.01 74.57 77.35 80.13 89.02 91.799999 97.909999 103.46999 107.35999">Preliminary</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 391.68 751.756)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="44.775 50.274003 53.271005 58.275007 63.279008 67.77901 72.27901 77.283008 79.281009 84.285 86.787 92.79 97.794 105.291 107.289 111.789 116.793 121.797 126.800998 131.805 136.305 138.80699 143.81099 146.80799 149.30998 151.81198 154.31398 159.31798 163.81798">Freescale Semiconductor, Inc.</tspan></text>
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<text fill="#ff0000" xml:space="preserve" transform="matrix(1 0 0 1 54 763.756)" font-size="10" font-family="HelveticaLTStd" font-weight="bold"><tspan y="8.59766" x="180.87 188.65 194.20999 200.31999 205.87999 209.76999 215.32999 218.10999 220.88999 228.10999 234.21999 239.77999 242.55998 248.66999 254.22998 259.78999 265.34999 268.12998 270.90998 277.01997 280.34996 286.45994 290.34996 299.23997 304.79997 308.12995 310.90995 317.01994">General Business Information</tspan></text>
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