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Ryan Malloy 5252d1d73c Add hardware reference docs (A3981, K60, RYS352A) 
Allegro A3981 stepper motor driver: datasheet, KiCad symbols/footprint,
3D model (TSSOP-28). Two per G2 board, SPI-controlled, AUTO microstep.

NXP MK60DN512VLQ10 (Kinetis K60): datasheet and 1300-page reference
manual. Cortex-M4 96MHz MCU running the G2 firmware.

Reyax RYS352A GPS module: datasheet and PAIR command guide.
GPS receiver on the G2 board (used for auto-location/satellite lookup).

All extracted as markdown + page images + vector SVGs for LLM context.
Binary assets (PDFs, PNGs, SVGs, STEP, WRL) stored via git-lfs.
2026-02-14 18:36:42 -07:00

111 lines
19 KiB (Stored with Git LFS)
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<text xml:space="preserve" transform="matrix(1 0 0 1 54 54)" font-size="14" font-family="TimesLTStd"><tspan y="11.85" x="0 8.554 15.554 19.446002 25.662003 30.324004 34.216005 41.216005 48.216005 51.716005 55.608007 62.608007 66.50001 73.50001 77.00001 83.21601 86.71601 96.82401 105.37801 113.932018 121.71602 125.21602 136.10802 143.10802 150.10802 156.32402 159.82402 166.04003 172.25603 179.25603 184.70203 190.91803 196.36403 199.86403 206.08003 209.97203 213.86403 217.36403 224.36403 229.02603 232.52603 236.41803 243.41803 249.63404 253.13404 260.13404 266.35005 273.35005 280.35005 287.35005 290.85005 297.06605 304.06605 311.06605 314.95805 319.62004 326.62004 330.51203 335.95805 339.45805 345.67405 352.67405 359.67405 363.17405 368.62007 374.83607 378.72807 382.62007 386.51206 393.51206 400.51206 405.95808 409.45808 413.35008 420.35008 423.85008 430.85008 437.06608 440.56608 447.56608 454.56608 464.67408 470.89009 475.55207 481.76808">Entering into a VLLS mode causes all of the debug controls and settings to be powered</tspan><tspan y="27.85" x="0 7 11.662001 16.324002 19.824002 23.324002 31.878003 38.878004 42.378004 49.378004 53.270006 60.270006 66.48601 69.98601 73.878009 77.770008 88.662 94.878009 98.378009 102.270008 109.270008 112.770008 116.662 123.662 129.878 133.378 140.378 146.59401 153.59401 160.59401 167.59401 174.59401 180.81002 185.47202 188.97202 192.86402 199.86402 203.36402 208.81002 215.81002 222.81002 229.02602 232.52602 242.63402 246.52602 250.41802 257.41804 260.91804 264.81004 271.81004 278.02604 281.52604 293.97206 303.31007 313.41807 316.91807 320.41807 324.31007 331.31007 337.52607 341.02607 353.47209 363.58009 376.0261 379.5261 389.6341 397.4181 400.9181 410.2561 417.2561 424.2561 428.1481 432.8101 439.8101 443.7021 447.2021 456.5401 462.7561 469.7561 473.6481 479.09413 482.9861 489.20213">off. To give time to the debugger to sync with the MCU, the MDM AP Control Register</tspan><tspan y="43.85" x=".00005 3.8920506 10.892051 17.108052 21.000052 28.000052 35.000055 41.216054 46.662054 50.162054 56.37805 59.87805 69.98605 76.20206 80.86406 87.86406 92.52606 101.08006 108.08006 118.188068 122.85007 131.40407 137.62007 143.83608 150.83608 157.05208 164.05208 170.26808 173.76808 183.87609 190.09209 197.09209 204.09209 211.09209 214.59209 223.93009 230.14609 237.14609 244.14609 250.36209 255.80809 259.7001 263.2001 267.8621 277.9701 286.52409 295.07807 305.18608 314.52409 324.63209 333.9701 342.52409 352.63209 357.29408 360.79408 367.79408 371.68608 375.57807 379.07807 382.97007 389.97007 396.18608 400.07807 403.57807 407.47007 412.91609 416.41609 421.8621 428.0781 431.9701 435.4701 439.3621 446.3621 449.8621 456.0781 463.0781 470.0781 474.74009 478.63209 485.63209 492.63209 497.29408">includes a Very-Low-Leakage Debug Request (VLLDBGREQ) bit that is set to configure</tspan><tspan y="59.85" x=".0001 3.8921004 10.8921 17.1081 20.6081 29.946103 36.1621 41.6081 47.8241 51.716104 55.216104 64.55411 71.55411 78.55411 82.446109 87.10811 94.10811 98.00011 101.892108 108.10811 112.77011 116.27011 120.16211 127.16211 134.16211 138.05411 144.27011 147.77011 151.66211 158.66211 162.16211 169.16211 176.16211 180.05411 187.05411 190.55411 194.4461 201.4461 207.66211 211.16211 216.60811 223.60811 229.05411 232.9461 239.16211 250.05411 253.55411 257.4461 264.4461 267.9461 272.6081 278.8241 284.2701 290.4861 294.3781 297.8781 304.09413 308.7561 312.6481 318.8641 323.5261 327.0261 330.9181 337.9181 344.1341 347.6341 354.6341 360.8501 367.8501 371.7421 375.2421 379.90409 386.1201 392.3361 399.3361 406.3361 412.5521 417.21409 424.21409 427.71409 432.37608 437.03807 444.03807 454.93006 458.43006 464.64607 468.14607 478.25407 486.80805 495.36204">the Reset Controller logic to hold the system in reset after the next recovery from a VLLS</tspan><tspan y="75.85" x=".0001 10.892101 17.892102 24.892102 31.1081 34.6081 38.1081 46.6621 53.6621 57.554105 63.000104 66.50011 73.50011 77.392108 81.2841 84.7841 91.00011 94.892108 98.7841 105.7841 115.892108 121.338108 124.838108 128.7301 135.7301 141.9461 145.4461 152.4461 158.66211 165.66211 172.66211 179.66211 186.66211 192.87812 197.54012 201.04012 204.93212 208.82411 219.71611 225.93212 229.43212 233.32411 240.32411 243.82411 248.48612 254.70212 258.59413 265.59413 269.4861 273.3781 277.2701 283.4861 287.3781 291.2701 297.4861 303.70213 307.20213 311.09413 318.09413 324.31013 327.81013 334.81013 341.02613 348.02613 355.02613 362.02613 365.52613 376.41813 383.41813 390.41813 397.41813 401.31013 407.52613 411.02613 418.02613 424.24214 428.9041 435.9041 440.5661 446.7821 450.2821 454.1741 461.1741">mode. This bit allows the debugger time to reinitialize the debug module before the</tspan><tspan y="91.85" x=".00014999999 7.00015 13.21615 20.21615 27.21615 34.21615 37.71615 43.162149 49.378149 54.824148 60.270147 64.16215 71.16215 78.16215 81.66215 87.87815 94.87815 101.87815 105.77015 109.66215 116.66215 123.66215 129.87815 135.32415">debug session continues.</tspan><tspan y="116.25" x=".00016 8.55416 15.55416 21.77016 25.27016 37.716165 47.824167 60.270166 63.770166 73.87817 81.66217 85.16217 94.50017 101.50017 108.50017 112.392169 117.05417 124.05417 127.94617 131.44617 140.78417 147.00017 154.00017 157.89217 163.33817 167.23017 173.44617 178.10817 181.60817 187.82418 191.71617 197.16217 204.16217 207.66217 211.55417 218.55417 224.77017 228.66217 235.66217 242.66217 248.87818 254.32418 257.82417 264.04017 267.54017 277.64817 283.86418 288.52616 295.52616 299.02616 307.58015 314.58015 324.68815 328.18815 336.74214 342.95814 349.17414 356.17414 362.39015 369.39015 375.60615 379.10615 389.21415 395.43016 402.43016 409.43016 416.43016 419.93016 430.03816 436.25416 443.25416 450.25416 457.25416 467.36216 471.25416 477.47016 484.47016 491.47016">The MDM AP Control Register also includes a Very Low Leakage Debug Acknowledge</tspan><tspan y="132.25" x=".0002 4.6622 14.770201 23.3242 31.8782 41.986204 51.324205 61.432207 71.54021 80.878208 90.986209 95.64821 99.14821 106.14821 110.04021 113.932209 117.432209 121.3242 128.3242 134.5402 138.4322 141.9322 145.8242 151.2702 154.7702 160.2162 166.4322 170.3242 173.8242 177.7162 184.7162 188.2162 192.8782 199.09421 202.9862 209.20221 215.41822 220.86421 227.08022 230.58022 234.47222 241.47222 247.68822 251.18822 261.2962 270.63423 283.08024 286.58024 292.79624 299.79624 304.45823 310.67424 314.17424 321.17424 327.39024 331.28224 338.28224 345.28224 348.78224 355.78224 361.99824 365.89024 372.89024 376.39024 380.28224 387.28224 390.78224 395.4442 401.66023 407.10624 413.32225 417.21424 420.71424 425.37623 432.37623 436.26823 440.16023 447.16023 457.26823 461.16023 468.16023 475.16023 478.66023">(VLLDBGACK) bit that is set to release the ARM core being held in reset following a</tspan><tspan y="148.25" x=".0002 10.108201 18.6622 27.216202 35.000204 38.500204 43.1622 49.3782 55.5942 62.5942 69.5942 75.8102 80.472209 87.472209 90.972209 94.472209 103.02621 110.02621 116.24221 119.74221 126.74221 132.9582 139.9582 146.9582 153.9582 160.9582 167.17421 171.83621 175.33621 179.99822 186.21422 190.10622 197.10622 200.99822 204.89022 208.78221 214.99822 218.89022 222.78221 228.99822 235.21422 240.66022 244.16022 250.37622 254.26822 258.16023 261.66023 268.66023 274.87623 281.87623 288.87623 295.87623 299.37623 304.0382 311.8222 315.3222 318.8222 325.0382 332.0382 339.0382 342.5382 346.4302 353.4302 359.6462 366.6462 370.1462 376.3622 381.80824 387.25425 393.47026 398.13224 402.02424 407.47026 410.97026 414.86225 421.86225">VLLS recovery. The debugger reinitializes all debug IP, and then asserts the</tspan><tspan y="164.25" x=".0002 10.108201 18.6622 27.216202 37.324205 46.662206 56.770208 66.878208 76.2162 86.3242 89.8242 96.04021 103.04021 110.04021 113.932209 118.59421 125.59421 129.4862 132.9862 139.9862 143.8782 147.7702 151.2702 155.1622 162.1622 165.6622 171.8782 175.7702 179.6622 186.6622 196.7702 200.2702 204.1622 211.1622 217.3782 220.8782 230.2162 239.5542 252.0002 255.5002 259.3922 266.3922 269.8922 274.5542 280.7702 284.6622 290.8782 297.0942 302.54023 308.75624 312.25624 316.14823 323.14823 329.36424 332.86424 342.97224 352.31025 364.75627 368.25627 374.47227 381.47227 386.13426 392.35026 395.85026 400.51225 405.17424 412.17424 423.06623 426.56623 431.2282 437.4442 442.89024 449.10624 452.99824 456.49824 462.71424 469.71424">VLLDBGACK control bit to allow the RCM to release the ARM core from reset and</tspan><tspan y="180.25" x=".0002 6.2162005 10.108201 14.000201 21.000203 31.108204 34.608205 43.946207 51.730207 61.838209 65.33821 72.33821 79.33821 85.554218 90.21622 96.43222 100.32422 104.21622 111.21622 118.21622 121.71622 125.608219 132.60822 136.10822 143.10822 149.32422 156.32422 160.21622 167.21622">allow CPU operation to begin.</tspan><tspan y="204.65" x=".0002 8.5542 15.5542 21.7702 25.2702 35.3782 43.9322 52.486204 62.594205 71.932209 82.04021 92.14821 101.486209 111.59421 115.09421 122.09421 125.986209 129.8782 133.3782 137.2702 142.7162 146.2162 152.4322 156.3242 162.5402 168.75621 173.41822 179.63422 186.63422 190.13422 197.13422 204.13422 207.63422 211.52622 218.52622 224.74222 228.24222 235.24222 241.45822 248.45822 255.45822 262.45823 269.45823 275.67424 280.3362 283.8362 288.4982 295.4982 300.1602 303.6602 309.8762 316.0922 323.0922 326.5922 333.5922 339.8082 343.3082 347.2002 353.4162 358.0782 361.97019 365.47019 370.9162 377.1322 381.0242 384.5242 390.7402 396.18623 399.68623 403.57823 409.02424 413.68623 417.18623 424.18623 428.8482 432.3482 438.5642 442.4562 448.6722 454.8882 459.5502">The VLLDBGACK bit is cleared by the debugger (or can be left set as is) or clears</tspan><tspan y="220.65" x=".0002 6.2162005 13.2162 17.1082 24.1082 35.000204 41.2162 45.108205 49.000207 55.216207 61.432207 65.3242 69.2162 76.2162 79.7162 86.7162 93.7162 99.932209 103.432209 107.3242 114.3242 117.8242 121.7162 128.7162 134.9322 138.4322 143.09421 149.31021 154.75621 160.97222 164.86421 168.36421 175.36421 181.58022 188.58022 194.79622 199.45822 205.67423 209.56623 215.78223 222.78223 226.28223 232.49823 237.94423 241.44423 248.44423 254.66024 259.32225 263.21424 266.71424 273.71424 278.37623 281.87623 285.76823 292.76823 298.98423 302.48423 309.48423 315.70024 322.70024 326.59223 330.09223 340.20024 348.7542 357.3082 365.0922 368.5922 373.25419 379.47019 385.6862 392.6862 399.6862 405.9022 410.56419 417.56419">automatically due to the reset generated as part of the next VLLS recovery.</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 54 18)" font-size="9" font-family="HelveticaLTStd" font-weight="bold"><tspan y="25.87323" x="0 5.499 10.998 16.497 21.501 24.498 27 32.499 37.998 43.002004 45.504 48.006 53.505 58.509004 63.513006 68.517009 72.018009 74.520008 80.019008 83.01601 85.518009 91.017009">Functional description</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 734.93869)" font-size="10" font-family="HelveticaLTStd" font-weight="bold"><tspan y="8.59766" x="130.006 137.226 142.786 148.346 151.12599 157.79599 163.90599 170.01599 173.346 179.456 185.01599 193.90599 196.68599 199.46599 205.02599 207.80599 215.02599 220.58599 223.91599 229.47599 233.36598 238.92598 245.03598 250.59598 256.15599 258.93598 267.26597 272.82597 278.93595 285.04594 290.60594 293.38594 296.16593 298.94593 306.16593 311.72593 317.28593 320.06593 322.84593 328.4059 331.1859 336.7459 342.8559 348.96589 351.74589 357.30589 362.86589 368.42588">K60 Sub-Family Reference Manual, Rev. 2 Jun 2012</tspan></text>
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