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Ryan Malloy 5252d1d73c Add hardware reference docs (A3981, K60, RYS352A) 
Allegro A3981 stepper motor driver: datasheet, KiCad symbols/footprint,
3D model (TSSOP-28). Two per G2 board, SPI-controlled, AUTO microstep.

NXP MK60DN512VLQ10 (Kinetis K60): datasheet and 1300-page reference
manual. Cortex-M4 96MHz MCU running the G2 firmware.

Reyax RYS352A GPS module: datasheet and PAIR command guide.
GPS receiver on the G2 board (used for auto-location/satellite lookup).

All extracted as markdown + page images + vector SVGs for LLM context.
Binary assets (PDFs, PNGs, SVGs, STEP, WRL) stored via git-lfs.
2026-02-14 18:36:42 -07:00

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28 KiB (Stored with Git LFS)
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<text xml:space="preserve" transform="matrix(1 0 0 1 54 82)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x="0 8.340001 16.680003 20.850003 29.190003 33.360006 41.700006 45.870008">22.4.4.3</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 122.3833 82)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x="0 8.340001 19.170002 31.665003 42.495004 46.665006 55.830007 64.170009 70.005008 75.00001 84.16501 90.00001 103.33501 111.67501 120.84001 129.18001 137.52 141.69 150.03 158.37 166.70999 180.045 189.20999 193.37999">eDMA performance example</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 54)" font-size="14" font-family="TimesLTStd"><tspan y="64.25" x="-.00599 9.332011 16.332013 23.332013 28.778014 32.670015 39.670015 45.886014 50.54801 54.04801 60.26401 63.76401 69.210018 76.210018 81.65601 85.54801 91.764019 102.65601 106.15601 116.264019 120.15601 124.04801 131.048 134.548 138.44 145.44 151.656 155.156 159.81801 166.81801 170.71 174.602 181.602 191.71 195.602 202.602 209.602 213.102 219.31801 226.31801 232.53401 237.19602 243.41202 249.62802 253.52002 259.73603 264.398 268.29 273.73603 277.62803 281.52003 287.73603 293.18205">Consider a system with the following characteristics:</tspan><tspan y="88.65" x="13.098 24.004002 28.666003 35.666 39.558004 45.774003 50.436 57.436 63.652 67.544 71.044 78.828 88.166 98.274 110.72 114.22 120.436008 126.65201 133.65201 137.15201 144.15201 150.36801 153.86801 160.08402 166.30002 172.51602 178.73203 184.17803 189.62403 195.84003 202.84003 206.34003 216.44803 220.34003 224.23203 231.23203 234.73203 241.73203 248.73203 254.94803 258.44804 268.55604 274.77204 278.66404 282.55604 287.21803 292.66404 296.55604 302.77204 306.66404 312.88005 316.38005 326.48805 333.48805 339.70405 346.70405 350.20405 357.20405 361.09605 367.31205 377.42005 383.63606 390.63606 394.13606 398.79804 403.46003 410.46003 421.35203 424.85203 428.74403 435.74403 441.96003 445.46003 450.90605 457.90605 463.35206 467.24406 473.46006">&#x2022;Internal SRAM can be accessed with one wait-state when viewed from the system</tspan><tspan y="104.65" x="24.00399 31.00399 38.00399 43.44999 46.94999 53.94999 60.16599 64.05799 70.273998 73.773998 80.773998 87.773998 93.99 99.436">bus data phase</tspan><tspan y="129.05" x="13.098001 24.004002 34.112005 38.004007 41.896009 45.396009 49.28801 56.28801 60.18001 66.39601 71.058017 78.058017 84.27402 88.166019 91.666019 98.666019 104.88202 109.54402 113.43602 120.43602 127.43602 133.65203 138.31403 144.53003 148.42203 151.92203 158.92203 165.92203 171.36803 174.86803 179.53003 185.74604 191.96204 198.96204 204.40804 207.90804 212.57004 218.78604 225.78604 232.78604 236.67804 241.34004 247.55605 251.05605 254.94805 265.05604 272.05604 275.55604 285.66404 291.88005 295.77204 299.66404 304.32603 309.77204 313.66404 319.88005 323.77204 329.98805 335.43406 338.93406 342.43406 348.65007 355.65007 362.65007 366.15007 370.04206 377.04206 380.93406 387.15007 391.81205 398.81205 405.02806 408.92005 412.42005 419.42005 425.63606 430.29804 434.19004 441.19004 448.19004 454.40605 459.06803 465.28404 469.17604 472.67604 479.67604 486.67604">&#x2022;All internal peripheral bus reads require two wait-states, and internal peripheral bus</tspan><tspan y="145.05002" x="24.004052 34.112054 38.77405 42.666055 46.558057 52.774057 58.220056 61.720056 65.61205 72.61205 77.274059 83.49006 89.70606 93.20606 103.314067 109.53007 113.422069 117.314067 121.97607 127.422069 131.31407 137.53008 141.42208 147.63808 153.08408 156.58408 163.58408 167.47608 173.69208 183.80008 190.01609 197.01609 200.51609 205.17809 209.84009 216.84009 227.73209 231.23209 235.12409 242.12409 248.34009 251.84009 257.2861 264.2861 269.73213 273.6241 279.84013 290.73213 294.23213 301.23213 308.23213 313.67814 317.17814 324.17814 330.39414 334.28614 340.50215 344.00215 351.00215 358.00215 364.21815 369.66416">writes three wait-states viewed from the system bus data phase</tspan><tspan y="169.45001" x="13.098062 24.004063 31.788064 38.788064 44.234064 48.126066 54.342065 65.23406 68.73406 75.73406 82.73406 88.950069 93.61207 99.82807 103.72007 109.93607 115.38207 118.88207 125.098079 128.99008 132.49008 139.49008 146.49008 153.49008 156.99008 169.43608 179.54409">&#x2022;System operates at 150 MHz</tspan><tspan y="203.85" x="-.0059280397 7.778073 14.778072 19.440073 22.940073 29.156075 36.156076 39.656076 47.440076 56.778078 66.88608 79.33208 82.83208 86.724079 93.724079 97.224079 101.11607 108.11607 112.00807 118.224079 122.88608 129.88608 136.10208 139.99408 143.49408 150.49408 156.71009 161.37209 165.26409 172.26409 179.26409 185.48009 190.14209 196.3581 200.25009 203.75009 210.75009 217.75009 223.19609 226.69609 230.58809 235.25009 241.4661 248.4661 253.9121 258.5741 264.7901 269.4521">For an SRAM to internal peripheral bus transfer,</tspan><tspan y="228.25" x="24.004103 31.788104 40.342103 50.450105 60.558107 65.22011 71.43611 78.43611 81.93611 89.83211 93.33211 100.33211 107.33211 114.33211 117.83211 130.2781 140.38611 146.60211 150.10211 153.99411 157.49411 162.15612 165.65612 172.65612 176.15612 184.05211 187.55211 192.21411 199.21411 202.71411 210.6101 214.1101 221.1101 225.77211 229.27211 237.1681 240.6681 245.33011 252.33011 255.83011 263.7261 267.2261 274.2261 278.8881 282.3881 290.2841 293.7841 300.7841 304.2841 308.94609 312.44609 318.66209 325.66209 331.87809 335.77009 341.98609 347.4321 350.9321 358.8281 362.3281 369.3281 376.3281 379.8281 386.8281 390.3281 402.7741 407.4361 413.6521 420.6521 424.5441 429.9901 436.20613">PEAKreq = 150 MHz / [ 4 + (1 + 1) + (1 + 3) + 3 ] cycles = 11.5 Mreq/sec</tspan><tspan y="254.25" x="-.0059070589 7.778094 14.778093 19.440094 22.940094 29.156094 36.156095 39.656095 43.548097 50.548097 54.440099 60.656099 65.3181 72.3181 78.5341 82.4261 85.9261 92.9261 99.142108 103.80411 107.696109 114.696109 121.696109 127.91211 132.57411 138.79012 142.68212 146.18212 153.18212 160.18212 165.62812 169.12812 173.02011 180.02011 183.52011 191.30411 200.6421 210.7501 223.1961 226.6961 230.5881 235.2501 241.46611 248.46611 253.91211 258.5741 264.7901 269.4521">For an internal peripheral bus to SRAM transfer,</tspan><tspan y="278.65" x="24.004103 31.788104 40.342103 50.450105 60.558107 65.22011 71.43611 78.43611 81.93611 89.83211 93.33211 100.33211 107.33211 114.33211 117.83211 130.2781 140.38611 146.60211 150.10211 153.99411 157.49411 162.15612 165.65612 172.65612 176.15612 184.05211 187.55211 192.21411 199.21411 202.71411 210.6101 214.1101 221.1101 225.77211 229.27211 237.1681 240.6681 245.33011 252.33011 255.83011 263.7261 267.2261 274.2261 278.8881 282.3881 290.2841 293.7841 300.7841 304.2841 308.94609 312.44609 318.66209 325.66209 331.87809 335.77009 341.98609 347.4321 350.9321 358.8281 362.3281 369.3281 376.3281 379.8281 386.8281 390.3281 402.7741 407.4361 413.6521 420.6521 424.5441 429.9901 436.20613">PEAKreq = 150 MHz / [ 4 + (1 + 2) + (1 + 1) + 3 ] cycles = 12.5 Mreq/sec</tspan><tspan y="304.65" x="-.0059070589 10.102094 15.548094 20.994095 27.994095 38.886098 42.7781 49.7781 56.7781 60.2781 66.4941 73.4941 76.9941 83.210109 90.210109 96.42611 103.42611 106.92611 113.92611 117.81811 123.26411 127.156108 131.8181 135.7101 142.7101 149.7101 153.6021 157.4941 164.4941 171.4941 174.9941 181.9941 186.6561 190.1561 194.0481 201.0481 207.2641 210.7641 214.6561 224.7641 231.7641 235.2641 239.1561 243.8181 250.0341 257.03413 262.48014 267.14213 273.35813 278.0201 281.5201 285.4121 292.4121 299.4121 305.6281 311.07414 314.57414 318.07414 321.96614 328.96614 335.18214 338.68214 344.89814 351.89814 358.11415 362.77613 368.99214 375.99214 382.20814 385.70814 392.70814 398.92414 405.14015 412.14015 415.64015 420.30213 426.51814 433.51814 440.51814 446.73414 452.18016 456.07215 459.57215 464.23414 470.45014 474.34214">Assuming an even distribution of the two transfer types, the average peak request rate</tspan><tspan y="320.65" x="-.0059070589 10.102094 17.102093 24.102093 27.994093 34.994096 38.494096 45.494096 51.710096">would be:</tspan><tspan y="345.05" x="24.004103 31.788104 40.342103 50.450105 60.558107 65.22011 71.43611 78.43611 81.93611 89.83211 93.33211 97.99411 104.99411 111.99411 115.49411 122.49411 125.99411 138.44011 143.10211 149.31812 156.31812 160.21012 165.65612 171.87212 178.08812 181.58812 189.48412 192.98412 199.98412 206.98412 210.48412 217.48412 220.98412 233.43012 238.09212 244.30812 251.30812 255.20012 260.64613 266.86213 273.07814 277.7401 281.2401 285.1321 288.6321 295.6321 299.1321 307.0281 310.5281 317.5281 324.5281 328.0281 335.0281 338.5281 350.97413 355.6361 361.8521 368.8521 372.7441 378.19013 384.40614">PEAKreq = (11.5 Mreq/sec + 12.5 Mreq/sec) / 2 = 12.0 Mreq/sec</tspan><tspan y="371.05" x="-.005876541 8.548123 15.548123 21.764124 25.264124 36.156126 40.048128 47.048128 50.94013 61.83213 68.83213 79.72413 83.22413 90.22413 97.22413 108.11613 115.11613 121.33213 125.99413 129.49414 136.49414 141.15615 144.65615 150.87215 157.87215 164.08815 167.98015 174.19615 179.64215 183.14215 187.03415 194.03415 197.53415 204.53415 210.75016 215.41216 220.07416 227.07416 231.73616 242.62816 246.12816 252.34416 255.84416 261.29017 265.18217 272.18217 279.18217 283.07417 289.29017 292.79017 297.45216 303.66816 309.88417 316.88417 320.77616 330.88417 335.54615 339.43815 343.33015 349.54615 353.04615 356.54615 362.76216 368.97816 373.64015 380.64015 384.14015 394.24815 400.46415 404.35615 408.24815 411.74815 417.19416 421.08616 427.30216 431.19416 437.41017 442.85618 446.35618 453.35618 460.35618 463.85618 467.74818 474.74818">The minimum number of cycles to perform a single read/write, zero wait states on the</tspan><tspan y="387.05" x="-.005846541 5.440154 12.440154 17.886155 21.778155 27.994156 38.886159 42.386159 49.386159 56.386159 61.832159 65.33215 68.83215 73.494159 78.15616 85.15616 96.04816 99.54816 105.76416 109.26416 115.48016 122.48016 126.37216 133.37216 136.87216 142.31816 146.21016 152.42617 157.08817 160.98017 164.48017 174.58817 181.58817 187.80417 192.46617 198.68218 202.18218 209.18218 216.18218 219.68218 225.89818 232.89818 239.11418 246.11418 253.11418 259.33018 263.22218 266.72218 270.61418 276.06019 279.56019 285.77619 292.77619 298.9922 305.2082 312.2082 316.1002 319.9922 326.9922 333.9922 337.4922 343.7082 350.7082 357.7082 361.2082 367.4242 377.5322 389.9782 400.0862 403.5862 407.4782 412.92424 416.42424 420.31623 427.31623 431.20823 437.42424 440.92424 447.14024 451.80223 458.01823">system bus, from a cold start where no channel is executing and eDMA is idle are:</tspan><tspan y="411.44999" x="13.098143 24.004143 31.004143 38.004144 41.504144 47.720144 54.720144 60.936143 64.82814 71.04414 76.49014 79.99014 84.652149 91.652149 96.31415 99.81415 106.03015 109.53015 114.97615 121.97615 126.63815 130.53015 140.63816 146.85416 151.51616 157.73217 161.23217 164.73217 168.62416 175.62416 181.84017 185.73217 189.23217 193.12416 198.57016 202.07016 205.57016 211.78617 215.28617 223.84017 233.17816">&#x2022;11 cycles for a software, that is, a TCD</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 54)" font-size="14" font-family="TimesLTStd" font-style="italic"><tspan y="411.44999" x="243.28614">n</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 54)" font-size="14" font-family="TimesLTStd"><tspan y="411.44999" x="250.28614 257.28614 266.62416 274.40815 283.74617 288.40815 296.19215 304.74613 314.85414 324.19215 332.74613 337.4081 340.9081 347.9081 351.8001 355.6921 359.1921 362.6921 367.3541 373.5701 380.5701 387.5701 393.7861 399.23213">_CSR[START] bit, request</tspan><tspan y="435.84999" x="13.098145 24.004147 31.004147 38.004148 41.504148 47.720148 54.720148 60.936147 64.82815 71.04415 76.49015 79.99015 84.65215 91.65215 96.314159 99.814159 106.03016 109.53016 116.53016 122.74616 127.408168 134.40818 144.51618 150.73218 155.39418 161.61019 165.11019 168.61019 172.50218 179.50218 185.71819 189.61019 193.11019 197.00218 202.44818 205.94818 209.44818 215.66419 222.66419 226.16419 232.38019 242.48819 254.93419 265.04219 268.54219 275.54219 281.75819 286.42018 290.31217 297.31217 304.31217 310.52818 315.19017 321.40617 325.29817 328.79817 333.46015 339.67616 346.67616 353.67616 359.89216 365.33818 369.23017 372.73017 378.17619 382.06819 389.06819 396.06819 402.28419 406.17619 409.67619 413.17619 417.83818 424.05418 431.05418 438.05418 444.27018 449.7162">&#x2022;12 cycles for a hardware, that is, an eDMA peripheral request signal, request</tspan><tspan y="470.24998" x="-.0058250429 8.548175 18.656176 25.656176 29.156176 35.372179 42.372179 48.588178 52.48018 58.69618 64.14218 67.64218 73.858188 80.07419 86.29019 93.29019 100.29019 107.29019 111.18219 114.68219 119.34419 126.34419 131.0062 134.5062 138.3982 145.3982 151.6142 155.1142 161.3302 165.9922 172.9922 176.8842 180.7762 185.4382 191.6542 195.5462 199.4382 206.4382 213.4382 216.9382 223.9382 227.8302 234.8302 241.0462 244.9382 248.8302 255.8302 262.0462 265.5462 271.7622 278.7622 285.7622 289.2622 296.2622 303.2622 309.4782 312.9782 319.1942 326.1942 330.0862 334.7482 340.9642 344.4642 350.6802 357.6802 363.8962 367.7882 374.0042 377.5042 384.5042 391.5042 395.0042 398.8962 405.8962 412.1122 415.6122 422.6122 428.82823 433.4902 440.4902 450.5982 456.8142 461.4762">Two cycles account for the arbitration pipeline and one extra cycle on the hardware</tspan><tspan y="486.24998" x="-.0057950427 4.656205 10.872206 17.872206 24.872206 31.088208 36.534208 40.42621 43.92621 48.588209 54.804208 60.250207 67.250209 71.142208 75.0342 78.9262 85.9262 92.9262 96.4262 101.0882 105.750209 112.750209 123.642208 127.142208 131.03421 138.03421 144.25022 147.75022 151.64221 158.64221 162.53421 168.75022 173.41222 180.41222 186.62822 190.52022 194.02022 198.68222 204.89823 211.89823 215.79022 221.23622 225.12822 231.34423 236.00623 239.89823 246.89823 253.89823 257.39823 264.39823 269.0602 272.5602 276.4522 283.4522 289.6682 293.1682 299.38423 309.49223 321.93824 332.04624 335.54624 342.54624 348.76225 353.42424 357.31623 364.31623 371.31623 377.53224 382.1942 388.41023 392.30223 395.80223 400.4642 406.6802 413.6802 420.6802 426.8962 432.34223 436.23423 439.73423 445.18025 449.07225 456.07225 463.07225 469.28825 473.18025 478.62626">request resulting from the internal registering of the eDMA peripheral request signals.</tspan><tspan y="502.24998" x="-.0057950427 7.778206 14.778206 19.440207 22.940207 26.832207 33.832208 40.048208 43.548208 50.548208 56.764207 62.980207 69.98021 73.48021 78.14221 84.358219 91.358219 98.358219 104.57422 110.02022 113.91222 117.41222 122.07422 128.29022 132.18222 138.39823 141.89823 148.11423 154.33023 158.22223 164.43824 171.43824 175.33023 181.54624 185.43824 189.33023 196.33023 203.33023 208.77623 212.27623 218.49224 225.49224 232.49224 239.49224 245.70824 249.20824 252.70824 256.60026 263.60026 269.81626 273.31626 279.53227 284.19425 291.19425 295.08625 298.97825 303.64024 309.85624 313.74824 317.64024 324.64024 331.64024 335.14024 341.35624 348.35624 355.35624 358.85624 363.51823 369.73423 376.73423 383.73423 389.95024 395.39625 399.28825 402.78825 407.45024 413.66624 420.66624 424.55824 430.00425 433.89625 440.11225 444.77424 448.66624 455.66624 462.66624 466.16624 470.05824">For the peak request rate calculations above, the arbitration and request registering is</tspan><tspan y="518.24996" x="-.0057950427 6.2102057 13.210205 18.656207 25.656207 30.318207 37.318208 43.534208 50.534208 54.034208 57.92621 64.92621 68.42621 75.42621 80.08821 83.58821 90.58821 97.58821 103.804218 108.46622 112.358219 118.57422 125.57422 131.02022 134.52022 138.41222 145.41222 151.62822 155.12822 162.12822 166.79022 173.00623 180.00623 183.89823 190.89823 197.89823 203.34423 206.84423 213.06023 220.06023 226.27623 232.49224 239.49224 243.38423 247.27623 254.27623 261.27626 264.77626 270.99226 277.99226 284.20826 291.20826 298.20826 304.42427 308.31626">absorbed in or overlaps the previous executing channel.</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 54)" font-size="14" font-family="HelveticaLTStd" font-weight="bold"><tspan y="542.4367" x="236.4402 246.5482 255.1022 259.7642">Note</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 54)" font-size="14" font-family="TimesLTStd"><tspan y="558.64999" x="71.9962 85.212207 92.212207 98.42821 105.42821 108.92821 115.14421 122.14421 128.36022 135.36022 142.36022 148.57622 152.46822 155.96822 159.86022 163.75222 170.75222 177.75222 181.64421 188.64421 195.64421 199.14421 206.14421 210.80622 214.30622 219.75222 225.96822 232.18422 236.07622 239.96822 246.18422 250.84622 254.73822 261.73823 267.95423 271.84623 278.84623 285.06224 289.7242 293.2242 297.1162 302.56224 306.06224 312.27824 319.27824 325.49424 332.49424 336.38624 342.60224 349.60224 353.10224 356.60224 362.81825 366.31825 370.21025 380.31825 387.31825 390.81825 397.03425 404.03425 410.25025 414.14225">When channel linking or scatter/gather is enabled, a two cycle</tspan><tspan y="574.64999" x="71.9962 78.9962 85.212207 89.1042 95.320209 102.320209 105.820209 109.712207 115.1582 118.6582 122.5502 133.4422 140.4422 147.4422 152.8882 159.1042 166.1042 169.6042 176.6042 183.6042 187.1042 190.9962 197.9962 204.2122 207.7122 214.7122 220.9282 227.9282 231.8202 235.3202 241.53621 248.53621 254.75222 261.7522 268.7522 274.9682 278.8602 282.3602 287.8062 294.02223 297.9142 304.13023 310.34623 314.23823 318.13023 325.13023 332.13023 335.63023 341.84623 348.84623 355.84623 359.34623 364.79225 368.68424 374.90025 379.56224 383.45423 390.45423 397.45423 400.95423 404.45423 413.0082 420.0082 423.9002">delay is imposed on the next channel selection and startup. This</tspan><tspan y="590.64999" x="71.9962 78.212207 82.1042 85.9962 92.9962 103.1042 108.5502 112.0502 115.9422 122.9422 129.1582 132.6582 136.5502 140.4422 147.4422 154.4422 157.9422 164.1582 171.1582 177.3742 184.3742 191.3742 197.59021 201.48221 204.98221 211.98221 216.64421 220.14421 224.03621 231.03621 237.25222 240.75222 246.19821 252.41422 258.63023 262.52223 266.4142 272.63023 277.2922 281.1842 288.1842 294.4002 298.2922 305.2922 311.5082 316.1702 319.6702 325.8862 332.8862 339.1022 346.1022 353.1022 359.3182 363.2102 366.7102 370.6022 377.6022 381.1022 388.1022">allows the link channel or the scatter/gather channel to be</tspan><tspan y="606.64999" x="71.9962 78.212207 82.1042 85.9962 92.9962 96.8882 103.8882 107.7802 113.9962 117.4962 123.712207 130.7122 137.7122 141.2122 147.4282 154.4282 161.4282 166.8742 170.7662 177.7662 183.98221 188.64421 194.86022 201.86022 205.36022 209.25222 216.25222 219.75222 223.64421 230.64421 236.86022 240.36022 246.57622 251.23822 258.23823 262.13023 266.02223 270.6842 276.9002 280.7922 284.6842 291.6842 298.6842 302.1842 309.1842 316.1842 323.1842 327.0762 330.5762 335.2382 342.2382 346.90019 350.40019 357.40019 363.61619 370.61619 374.50819 378.00819 384.22419 391.22419 397.4402 404.4402 411.4402 417.6562">eligible and considered in the arbitration pool for next channel</tspan><tspan y="622.64999" x="71.9962 77.4422 83.6582 87.5502 93.766208 99.98221 103.87421 107.766208 114.766208 121.766208">selection.</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 54 18)" font-size="9" font-family="HelveticaLTStd" font-weight="bold"><tspan y="26.01031" x="278.955 285.45298 290.95198 295.95597 301.45497 304.45198 309.45597 312.95698 315.45899 320.46299 325.46699 327.969 334.46699 336.969 340.47 345.474 350.478 353.475 355.97703 363.47404 368.47804 376.47904 381.97804 385.47904 390.48304 392.98506 399.48304 404.48704 409.49104 414.49504 419.49903 424.50303 427.00505 433.50303 439.002 444.501 447.49803 450.99903 456.49803 459.00004 461.50205 466.50605 470.00706 472.50907 475.50608 480.51008 487.00807 494.50508 501.00306">Chapter 22 Direct Memory Access Controller (eDMA)</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 734.93869)" font-size="10" font-family="HelveticaLTStd" font-weight="bold"><tspan y="8.59766" x="130.01 137.23 142.79 148.34999 151.12999 157.79999 163.90999 170.01999 173.34999 179.45999 185.01999 193.90999 196.68999 199.46999 205.02999 207.80998 215.02999 220.58998 223.91999 229.47998 233.36998 238.92998 245.03998 250.59998 256.15998 258.93998 267.26997 272.82997 278.93995 285.04994 290.60993 293.38993 296.16993 298.94993 306.16993 311.72993 317.28993 320.06993 322.8499 328.4099 331.1899 336.7499 342.8599 348.96989 351.74989 357.30989 362.86988 368.42988">K60 Sub-Family Reference Manual, Rev. 2 Jun 2012</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 751.756)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x=".00401 5.5030105 8.5000109 13.504011 18.50801 23.00801 27.50801 32.512014 34.510015 39.514017 42.016016 48.019014 53.023015 60.520017 62.518018 67.01802 72.02202 77.02602 82.030017 87.03401 91.53401 94.03601 99.04001 102.03701 104.53901 107.04101 109.54301 114.547008 119.047008">Freescale Semiconductor, Inc.</tspan></text>
<text fill="#ff0000" xml:space="preserve" transform="matrix(1 0 0 1 220.32 751.756)" font-size="10" font-family="HelveticaLTStd" font-weight="bold"><tspan y="8.59766" x="58.45 65.12 69.01 74.57 77.35 80.13 89.02 91.799999 97.909999 103.46999 107.35999">Preliminary</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 391.68 751.756)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="151.308 156.312 161.316">517</tspan></text>
<text fill="#ff0000" xml:space="preserve" transform="matrix(1 0 0 1 54 763.756)" font-size="10" font-family="HelveticaLTStd" font-weight="bold"><tspan y="8.59766" x="180.87 188.65 194.20999 200.31999 205.87999 209.76999 215.32999 218.10999 220.88999 228.10999 234.21999 239.77999 242.55998 248.66999 254.22998 259.78999 265.34999 268.12998 270.90998 277.01997 280.34996 286.45994 290.34996 299.23997 304.79997 308.12995 310.90995 317.01994">General Business Information</tspan></text>
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