Ryan Malloy
5252d1d73c
Allegro A3981 stepper motor driver: datasheet, KiCad symbols/footprint, 3D model (TSSOP-28). Two per G2 board, SPI-controlled, AUTO microstep. NXP MK60DN512VLQ10 (Kinetis K60): datasheet and 1300-page reference manual. Cortex-M4 96MHz MCU running the G2 firmware. Reyax RYS352A GPS module: datasheet and PAIR command guide. GPS receiver on the G2 board (used for auto-location/satellite lookup). All extracted as markdown + page images + vector SVGs for LLM context. Binary assets (PDFs, PNGs, SVGs, STEP, WRL) stored via git-lfs.
301 lines
47 KiB (Stored with Git LFS)
XML
301 lines
47 KiB (Stored with Git LFS)
XML
<svg xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:inkscape="http://www.inkscape.org/namespaces/inkscape" version="1.1" width="612" height="777.60006" viewBox="0 0 612 777.60006">
|
|
<defs>
|
|
<clipPath id="clip_1">
|
|
<path transform="matrix(1,0,0,1,54,73)" d="M.49 .49H100.310009V15.51H.49Z" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_2">
|
|
<path transform="matrix(1,0,0,1,54,73)" d="M101.29 .49H503.51V15.51H101.29Z" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_3">
|
|
<path transform="matrix(1,0,0,1,54,89)" d="M.245 .49H100.555V200.905H.245Z" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_4">
|
|
<path transform="matrix(1,0,0,1,54,89)" d="M101.04501 .49H503.755V200.905H101.04501Z" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_5">
|
|
<path transform="matrix(1,0,0,1,54,290.15)" d="M.245 .245H100.555V134.85501H.245Z" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_6">
|
|
<path transform="matrix(1,0,0,1,54,290.15)" d="M101.04501 .245H503.755V134.85501H101.04501Z" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_7">
|
|
<path transform="matrix(1,0,0,1,54,425.25)" d="M.245 .245H100.555V173.255H.245Z" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_8">
|
|
<path transform="matrix(1,0,0,1,54,425.25)" d="M101.04501 .245H503.755V173.255H101.04501Z" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_9">
|
|
<path transform="matrix(1,0,0,1,54,73)" d="M-.25 0-1.20866-1.91732H100.9V0 1.91732H.70866" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_10">
|
|
<path transform="matrix(1,0,0,1,54,73)" d="M100.8-.5H102.71732V16.5H100.8 98.88268V-.5" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_11">
|
|
<path transform="matrix(1,0,0,1,54,73)" d="M101.4 16V17.91732H-.5V16 14.08268H101.4" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_12">
|
|
<path transform="matrix(1,0,0,1,54,73)" d="M0 16-1.91732 17.91732V-1.20866L0-.25 1.91732 .70866V14.08268" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_13">
|
|
<path transform="matrix(1,0,0,1,54,73)" d="M100.7 0V-1.91732H505.20866L504.25 0 503.29136 1.91732H100.7" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_14">
|
|
<path transform="matrix(1,0,0,1,54,73)" d="M504-.25 505.91734-1.20866V17.91732L504 16 502.08268 14.08268V.70866" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_15">
|
|
<path transform="matrix(1,0,0,1,54,73)" d="M504.5 16V17.91732H100.2V16 14.08268H504.5" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_16">
|
|
<path transform="matrix(1,0,0,1,54,89)" d="M100.8-.6H102.46732V201.5H100.8 99.13268V-.6" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_17">
|
|
<path transform="matrix(1,0,0,1,54,89)" d="M101.15 201.15V202.81732H-.25V201.15 199.48267H101.15" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_18">
|
|
<path transform="matrix(1,0,0,1,54,89)" d="M0 201.25H-1.66732V.4H0 1.66732V201.25" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_19">
|
|
<path transform="matrix(1,0,0,1,54,89)" d="M504 .4H505.66734V201.25H504 502.33268V.4" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_20">
|
|
<path transform="matrix(1,0,0,1,54,89)" d="M504.25 201.15V202.81732H100.45V201.15 199.48267H504.25" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_21">
|
|
<path transform="matrix(1,0,0,1,54,290.15)" d="M100.8-.35H102.46732V135.45001H100.8 99.13268V-.35" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_22">
|
|
<path transform="matrix(1,0,0,1,54,290.15)" d="M101.15 135.1V136.76734H-.25V135.1 133.43268H101.15" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_23">
|
|
<path transform="matrix(1,0,0,1,54,290.15)" d="M0 135.20001H-1.66732V-.1H0 1.66732V135.20001" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_24">
|
|
<path transform="matrix(1,0,0,1,54,290.15)" d="M504-.1H505.66734V135.20001H504 502.33268V-.1" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_25">
|
|
<path transform="matrix(1,0,0,1,54,290.15)" d="M504.25 135.1V136.76734H100.45V135.1 133.43268H504.25" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_26">
|
|
<path transform="matrix(1,0,0,1,54,425.25)" d="M100.8-.35H102.46732V173.75H100.8 99.13268V-.35" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_27">
|
|
<path transform="matrix(1,0,0,1,54,425.25)" d="M100.9 173.5V175.16733H-.95866L-.125 173.5 .70866 171.83267H100.9" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_28">
|
|
<path transform="matrix(1,0,0,1,54,425.25)" d="M0 173.625-1.66732 174.45867V-.1H0 1.66732V172.79134" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_29">
|
|
<path transform="matrix(1,0,0,1,54,425.25)" d="M504-.1H505.66734V174.45867L504 173.625 502.33268 172.79134V-.1" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_30">
|
|
<path transform="matrix(1,0,0,1,54,425.25)" d="M504.125 173.5 504.95866 175.16733H100.7V173.5 171.83267H503.29136" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_31">
|
|
<path transform="matrix(1,0,0,1,54,24.56929)" d="M0 0H504V8.50394H0Z" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_32">
|
|
<path transform="matrix(1,0,0,1,54,748.55599)" d="M0 0V-1.61732H166.42002V0 1.61732H0" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_33">
|
|
<path transform="matrix(1,0,0,1,54,748.55599)" d="M166.22 0V-1.61732H337.78V0 1.61732H166.22" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
<clipPath id="clip_34">
|
|
<path transform="matrix(1,0,0,1,54,748.55599)" d="M337.58 0V-1.61732H504V0 1.61732H337.58" clip-rule="evenodd"/>
|
|
</clipPath>
|
|
</defs>
|
|
<path transform="matrix(1,0,0,1,54,54)" d="M0 0H504V561H0Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 150 54)" font-size="12" font-family="HelveticaLTStd" font-weight="bold"><tspan y="10.11719" x="15.3 22.632 29.304 36.636 39.972 46.644 49.980005 56.652006 63.324007 67.32001 73.992008 80.664 93 102.996 111.66 120.996 124.332 135 142.332 149.664 156.336 163.008 166.344 173.676 177.672 181.008 188.34 195.672 202.344 207.012 213.68399 217.68 221.01599 228.34799 235.68 239.01599 243.012 249.68399 257.016 264.348 268.344 271.68 279.012 286.344 293.016 300.348">Table 25-18.MCG modes of operation (continued)</tspan></text>
|
|
<g clip-path="url(#clip_1)">
|
|
<path transform="matrix(1,0,0,1,54,73)" d="M.5 .5H100.3V15.5H.5Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 56.5 75.5)" font-size="9" font-family="HelveticaLTStd" font-weight="bold"><tspan y="7.83789" x="1.998 9.495001 14.994001 20.493002">Mode</tspan></text>
|
|
<g clip-path="url(#clip_2)">
|
|
<path transform="matrix(1,0,0,1,54,73)" d="M101.3 .5H503.5V15.5H101.3Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 157.3 75.5)" font-size="9" font-family="HelveticaLTStd" font-weight="bold"><tspan y="7.83789" x="1.998 8.496 13.500001 18.504002 23.508004 27.009003 29.511004 35.010004 38.007005 40.509004 46.008005">Description</tspan></text>
|
|
<g clip-path="url(#clip_3)">
|
|
<path transform="matrix(1,0,0,1,54,89)" d="M.25 .5H100.55V200.9H.25Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 56.25 91.5)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 5.499 10.503 15.507001 18.009 24.012001 28.512001 33.516004 38.520006 43.020006 47.520006 52.524007 57.528009 60.030008 66.033008 70.533008 73.035 78.039 81.036 86.04 91.044">FLL Bypassed External</tspan><tspan y="18.83789" x="0 2.997 8.496 14.499001 20.502">(FBE)</tspan></text>
|
|
<g clip-path="url(#clip_4)">
|
|
<path transform="matrix(1,0,0,1,54,89)" d="M101.05 .5H503.75V200.9H101.05Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 157.05 91.5)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 5.499 10.503 15.507001 18.009 23.013 27.513 32.517004 37.521005 42.021005 46.521005 51.525007 56.529008 59.031007 64.035 68.535 71.037 76.041 79.038 84.042 89.046 91.044 93.546 96.543 102.042 108.045 114.048 117.045 119.547 127.044 132.048 137.052 142.056 144.558 146.556 151.056 153.558 158.562 163.566 166.068 171.07199 174.06899 179.07299 184.07698 186.57898 193.07698 198.08098 203.08498 208.08898 210.59098 215.59497 217.59297 219.59098 222.09297 224.59497 229.59897 234.60297 237.10497 239.60697 244.61096 246.60897 248.60697 253.61096 260.10896 262.10694 267.11094 272.11494 274.61695 279.11695 284.12095 289.12495 294.12895 296.12693 298.62895 300.62693 305.63093 310.63493 315.13493 317.63694 322.64094 327.14094 331.64094 336.64494 339.64195">FLL bypassed external (FBE) mode is entered when all the following conditions occur:</tspan><tspan y="24.23789" x="14.85 24.003 30.501002 35.505 38.007 44.505 49.509004 55.512 61.515 64.017 66.519 71.522998 73.520999 76.022998 80.522998 83.024997 88.02899 91.02599 96.02999 98.53199 105.02999 108.02699 110.024997 112.52699 115.02899 120.03299 125.03699 127.53899 130.04099 135.04499 137.54698 142.55098">•C1[CLKS] bits are written to 10</tspan><tspan y="40.63789" x="14.85 24.003 30.501002 35.505 38.007 40.509 47.007 53.010004 58.509004 64.512 67.014 69.516 74.52 76.518 79.02 81.521999 83.52 88.02 90.521999 97.02 100.017 102.015 104.517 107.019 112.022998 117.02699 119.52899 122.03099 127.03499 129.53699">•C1[IREFS] bit is written to 0</tspan><tspan y="57.037889" x="14.85 24.003 30.501002 35.505 38.007 43.506 50.004 56.502004 59.004 65.007 67.509 70.011 77.508 82.512 87.012 89.514 92.016 97.02 102.023998 104.52599 111.023998 114.020999 116.019 118.520999 121.022998 126.02699 131.03099 133.53299 136.03499 141.03899 143.54099 148.54499 150.54299 155.04299 157.04099 162.04499 167.04898 169.55098 174.55498 179.05498 181.55698 186.56098 189.55797 194.56197 199.56597 201.56397 204.06597 207.06296 212.06696 214.56896 219.57295 222.56995 227.57395 232.57794 237.07794 242.08194 244.58394 249.08394 251.08194 256.08595 260.58595 265.08595 267.58796 270.08998 275.09397 277.59599 282.59999 287.60398 290.106 296.60398 298.60197 301.10398 306.10798 308.10597 313.10997 315.61198 318.11399 323.11799 328.12199 330.624 333.621 338.625 343.629 348.633 353.637 356.139 361.143 363.64503 366.14704 371.15104 376.15504 378.65705 383.66105">•C1[FRDIV] must be written to divide external reference clock to be within the range of 31.25</tspan><tspan y="68.03789" x="24.00301 28.50301 35.00101 39.50101 42.00301 44.50501 49.50901 52.01101 57.01501 62.019014 64.52101 69.52501 74.52901 79.533008 84.537 87.039 91.539 98.037 102.537">kHz to 39.0625 kHz.</tspan><tspan y="84.43789" x="14.85001 24.00301 30.50101 35.505014 38.00701 44.01001 49.01401 54.018014 60.02101 62.52301 65.02501 70.02901 72.02701 74.52901 77.031009 79.02901 83.52901 86.031009 92.52901 95.52601 97.52401 100.02601 102.52801 107.532009 112.536 115.038 117.54 122.544 125.046">•C6[PLLS] bit is written to 0</tspan><tspan y="100.83789" x="14.85001 24.00301 30.50101 35.505014 38.00701 43.011014 49.014017 51.516016 54.018014 56.016016 60.516016 63.018014 69.516017 72.513019 74.51102 77.013019 79.515018 84.51901 89.52301 92.02501 94.52701 99.531009 102.033008">•C2[LP] is written to 0</tspan><tspan y="127.23789" x=".000009536743 2.5020099 7.5060107 10.008011 15.507011 21.510012 27.513012 30.015013 37.512014 42.516016 47.520017 52.524019 55.026018 57.528017 60.030015 65.03401 70.03801 72.54001 80.03701 86.53501 93.53701 100.53901 107.03701 112.53601 119.03401 124.03801 130.04102 132.54302 134.54102 139.04102 141.54302 146.54701 151.55101 154.548 156.546 161.046 166.05 171.054 173.556 176.058 179.055 184.05899 191.55599 194.05799 196.55998 201.56398 206.56798 209.06998 216.07198 222.07498 228.57299 234.57599 240.579 245.583 248.08499 253.08899 257.589 260.091 265.095 268.092 273.096 278.1 280.098 282.6 285.59703 290.601 293.10304 298.10704 301.10404 306.10804 311.11204 315.61204 320.61604 323.11805 327.61805 329.61604 334.62004 339.12004 343.62004 346.12205 348.62406 354.12306 359.12705 364.13105 366.63307 372.13206 377.13606 382.14006 384.64207 386.64006">In FBE mode, the MCGOUTCLK is derived from the OSCSEL external reference clock. The FLL is</tspan><tspan y="138.23789" x=".000009536743 5.00401 10.008011 15.012012 18.009013 23.013012 25.515013 27.513012 32.517015 37.521017 42.525018 44.523019 47.025018 52.02902 57.03302 59.53502 62.037019 64.03502 66.53702 71.03702 73.53902 78.543018 83.54701 86.04901 91.05301 96.05701 98.559009 101.061008 103.059009 107.559009 110.061008 115.065 120.069 122.571 125.073 130.077 134.577 139.581 144.58499 147.08699 149.58899 155.08798 160.09198 162.08998 166.58998 169.09198 176.58898 181.59297 186.59697 191.60097 194.10297 196.10097 200.60097 203.10297 208.10697 212.60697 217.61096 220.11296 225.11696 227.11496 229.61696 232.11896 237.12296 239.62496 244.62895 246.62696 248.62496 253.62895 260.12696 262.62898 265.13099 270.13499 275.13899 277.641 283.13999 288.14399 293.14799 295.65 298.152 303.156 305.65803 310.66203 315.16203 320.16603 325.17 327.168 330.165 335.169 337.67103 339.669 342.17103 346.67103 349.17304 351.67506 356.67906 359.67607 364.68006 369.68406">operational but its output is not used. This mode is useful to allow the FLL to acquire its target</tspan><tspan y="149.23789" x=".000009536743 2.5020099 5.49901 10.503011 15.507011 20.511013 25.515015 30.519017 35.019018 39.519018 42.021017 48.519018 53.523019 55.52102 57.51902 62.52302 65.025028 67.52702 72.53102 77.53502 80.03702 87.53402 94.03202 101.03402 108.03602 114.53402 120.03302 126.53102 131.53502 137.53803 140.04003 142.03803 146.53803 149.04003 154.04402 157.04102 159.03902 163.53902 168.54302 173.54701 176.04901 178.55101 181.548 186.552 194.049 196.551 199.053 204.05699 209.06099 211.56299 216.56699 221.06699 223.56899 228.57299 231.56998 236.57398 241.57798 243.57598 246.07798 249.07497 254.07897 256.58097 261.58497 264.58198 269.58598 274.58998 279.08998 284.09397 286.59599 291.09599 293.09397 298.09797 302.59797 307.09797 309.59999 312.102 317.60099 322.60499 327.60899 330.111 335.61 340.61399 345.61799 348.12 352.62 354.61799 359.62199 364.12199">frequency while the MCGOUTCLK is driven from the external reference clock. The FLL clock</tspan><tspan y="160.23789" x=".000009536743 2.9970096 9.49501 15.993011 22.995013 29.493014 34.497014 40.500017 43.497018 45.999017 47.997018 52.497018 54.999017 59.499017 64.50301 69.50701 72.00901 75.00601 80.01001 82.00801 84.00601 89.01001 94.01401 96.51601 101.520008 106.020008 108.522 111.024 116.028 121.032 123.534 128.538 133.038 135.54 140.54399 143.54099 148.54499 153.54898 155.54698 158.04898 161.04598 166.04998 168.55197 173.55597 176.55297 181.55696 186.56096 191.06096 196.06496 198.56696 203.06696 205.06496 210.06896 214.56896 219.06896 221.57096 224.07295 229.07695 234.08095 239.08495 241.58695 244.08895 249.09294 254.09694 256.59895 263.09693 269.5949 276.59693 279.09895 283.59895 285.59693 290.60093 295.10093 299.60093 302.10295 304.60496 307.60197 312.60597 317.60997 322.61396 327.61796 332.62196 337.12196 341.62196 344.12397 346.12196 351.12596 355.62596 360.12596 364.62596 367.12797 369.62998 374.63398 377.136">(DCOCLK) is controlled by the external reference clock, and the DCO clock frequency locks to a</tspan><tspan y="171.23789" x=".000049536743 7.4970505 12.501051 14.499051 17.00105 18.99905 24.003052 26.001053 27.999054 32.499055 37.503057 40.005056 42.003057 47.007059 52.01106 54.513059 57.015058 62.01906 66.51906 69.02106 74.025058 77.02206 79.524059 82.026058 87.03005 91.53005 94.03205 98.53205 103.53605 105.53405 110.53805 115.03805 117.54005 122.544048 127.54804 130.05005 135.05405 139.55405 142.05605 148.55405 153.55805 156.06005 162.55805 169.05605 175.05905 180.55805 185.56204 192.06005 198.55805 204.56105 207.06305 209.56505 214.56905 219.57305 224.57704 227.07904 233.57704 238.58104 241.08304 247.58104 255.07804 261.08103 266.08503 271.08903 273.59104 276.09306 281.09706 283.09504 285.59706 290.09706 292.59907 295.10108 297.6031 299.60108 307.09809 312.10209 316.60209 319.1041 321.6061 326.6101 331.6141 334.11613 339.12013 341.1181 345.6181 347.6161 352.6201 357.62409 362.62809 365.1301 370.1341 374.6341 377.1361 382.1401 385.13713 390.1411 395.1451">multiplication factor, as selected by C4[DRST_DRS] and C4[DMX32] bits, times the divided external</tspan><tspan y="182.23789" x=".000049536743 2.9970496 8.00105 10.50305 15.5070509 18.504052 23.508053 28.512055 33.012056 38.016057 40.518056 43.020055 46.017057 51.021059 56.02506 61.02906 66.03306 71.037059 75.537059 80.037059 82.539058 85.04105 91.04405 96.04805 101.05205 103.55405 106.056049 111.06004 116.06404 118.56604 125.06404 130.06804 132.57004 139.06804 146.56504 152.56804 157.57204 162.57604 165.07804 167.58003 172.58403 174.58203 177.08403 179.58603 184.59003 189.59403 194.09403 198.59403 201.59102 203.58902 208.59302 211.09502 213.09302 218.09702 223.10102 225.60301 228.10501 233.10901 236.106 238.608 246.105 251.109 254.10599 259.11 261.612 266.616 271.62 274.122 279.126 281.124 283.12199 287.62199 290.124 292.626 295.12803 300.13203 302.63404 308.13304 314.13603 316.63804 319.14006 326.63706 331.64106 336.64506 341.64906 344.15107 346.65309 351.65708 356.66108 359.1631 365.16609 370.17008 375.17408 377.6761 379.67408">reference frequency. See the C4[DMX32] bit description for more details. In FBI mode the PLL is</tspan><tspan y="193.23789" x=".000049536743 5.0040504 7.0020506 11.50205 16.50605 21.510052 23.508053 28.512055 33.516057 36.018056 38.016057 43.020059 45.522058 50.52606 53.028059 55.02606 60.03006 66.52806 69.52506 74.52906 79.53306 86.03106 91.03506 94.03206 96.53406 101.03406 103.53606 108.540058 111.04205 116.04605 118.54805 123.55205 128.55605 130.55405 135.55805 140.05805 144.55805 147.06005 153.55805 158.56204 161.06404 167.06705 172.07105 177.07505 183.57305 188.57704 194.58005 200.58306 207.08106 212.08506 214.58705 217.08905 219.08705 223.58705 226.08905 230.58905 235.59305 238.09505">disabled in a low-power state unless C5[PLLCLKEN0] is set.</tspan></text>
|
|
<g clip-path="url(#clip_5)">
|
|
<path transform="matrix(1,0,0,1,54,290.15)" d="M.25 .25H100.55V134.85H.25Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 56.25 292.4)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 6.0030004 11.007001 16.011002 18.513003 24.516003 29.520005 34.524007 39.528009 44.53201 49.53601 54.540014 57.04201 63.045015 67.54501 70.04701 75.05101 78.04801 83.05201 88.05601">PLL Engaged External</tspan><tspan y="18.83789" x="0 2.997 9 15.003 21.006">(PEE)</tspan></text>
|
|
<g clip-path="url(#clip_6)">
|
|
<path transform="matrix(1,0,0,1,54,290.15)" d="M101.05 .25H503.75V134.85H101.05Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 157.05 292.4)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 6.0030004 11.007001 16.011002 18.513003 24.516003 29.520005 34.524007 39.528009 44.53201 49.53601 54.540014 57.04201 63.045015 67.54501 70.04701 75.05101 78.04801 83.05201 88.05601 90.05401 92.55601 95.55301 101.55601 107.559009 113.562007 116.559009 119.061008 126.55801 131.56201 136.56601 141.57 144.072 146.07 150.57 153.072 158.076 163.08 165.582 170.586 173.583 178.58699 183.59099 186.09299 192.59099 197.59499 202.59899 207.60298 210.10498 215.10898 217.10698 219.10498 221.60698 224.10898 229.11298 234.11698 236.61898 239.12097 244.12497 246.12297 248.12097 253.12497 259.62297 261.62095 266.62495 271.62895 274.13096 278.63096 283.63496 288.63896 293.64295 295.64094 298.14295 300.14094 305.14494 310.14894 314.64894 317.15095 322.15495 326.65495 331.15495 336.15895 339.15596">PLL Engaged External (PEE) mode is entered when all the following conditions occur:</tspan><tspan y="24.23789" x="14.85 24.003 30.501002 35.505 38.007 44.505 49.509004 55.512 61.515 64.017 66.519 71.522998 73.520999 76.022998 80.522998 83.024997 88.02899 91.02599 96.02999 98.53199 105.02999 108.02699 110.024997 112.52699 115.02899 120.03299 125.03699 127.53899 130.04099 135.04499 137.54698 142.55098">•C1[CLKS] bits are written to 00</tspan><tspan y="40.63789" x="14.85 24.003 30.501002 35.505 38.007 40.509 47.007 53.010004 58.509004 64.512 67.014 69.516 74.52 76.518 79.02 81.521999 83.52 88.02 90.521999 97.02 100.017 102.015 104.517 107.019 112.022998 117.02699 119.52899 122.03099 127.03499 129.53699">•C1[IREFS] bit is written to 0</tspan><tspan y="57.037889" x="14.85 24.003 30.501002 35.505 38.007 44.010004 49.014005 54.018007 60.021005 62.523004 65.025 70.029 72.027 74.529 77.031 79.029 83.529 86.031 92.529 95.526 97.524 100.026 102.528 107.532 112.535999 115.037998 117.53999 122.54399 125.04599">•C6[PLLS] bit is written to 1</tspan><tspan y="83.43789" x="0 2.5020004 7.506001 10.008001 16.011002 22.014002 28.017003 30.519003 38.016004 43.020006 48.024007 53.028009 55.530008 58.032007 60.534006 65.538 70.542 73.044 80.541 87.039 94.041 101.043 107.541 113.04 119.538 124.542 130.545 133.047 135.045 139.545 142.047 147.051 152.055 155.05199 157.04999 161.54999 166.55399 171.55799 174.05998 176.56198 179.55898 184.56298 192.05997 194.56197 197.06397 202.06797 207.07196 209.57396 215.57697 220.58097 225.58496 228.08696 232.58696 234.58496 239.58896 244.08896 248.58896 251.09096 253.59296 260.09095 265.09495 267.09294 271.59294 276.59693 279.09895 281.09693 285.59693 288.09895 292.59895 297.60295 302.60694 305.10896 308.10597 313.10997 315.10795 317.10594 322.10993 327.11393 329.61595 334.61994 339.11994 341.62196 344.12397 349.12797 354.13197 356.63398 361.63798 366.13798 368.63999 373.64399 376.641 381.645 386.649">In PEE mode, the MCGOUTCLK is derived from the PLL clock, which is controlled by the external</tspan><tspan y="94.43789" x=".00003 2.99703 8.001031 10.503031 15.507031 18.504033 23.508034 28.512036 33.012037 38.016038 40.518037 45.018037 47.016038 52.02004 56.52004 61.02004 63.522039 66.02404 71.52304 76.52704 81.53104 84.033039 90.03603 95.04003 100.04403 102.54603 107.04603 109.04403 114.04803 118.54803 123.04803 125.550029 128.05204 131.04903 136.05303 141.05702 146.06102 151.06502 156.06902 160.56902 165.06902 167.57102 169.56902 174.57302 179.07302 183.57302 188.07302 190.57501 193.07701 198.08101 200.58301 205.587 208.089 215.586 220.59 222.588 225.09 227.088 232.092 234.09 236.088 240.588 245.592 248.094 250.092 255.096 260.1 262.60203 265.10404 270.10804 274.60804 277.11006 282.11405 285.11106 287.61308 290.11509 295.11909 299.61909 302.1211 306.6211 311.6251 316.6291 321.1291 323.12709 325.6291 327.62709 332.63108 337.63508 340.1371 345.14109 349.64109 352.1431 358.64109 363.64509 366.1471 372.1501 378.64808 381.1501 387.15309 392.15708 394.6591">reference clock. The PLL clock frequency locks to a multiplication factor, as specified by C6[VDIV0],</tspan><tspan y="105.43789" x=".000069999998 2.5020705 4.5000708 11.997071 17.001072 21.501072 24.003073 26.505074 31.509076 36.513078 39.015077 44.019079 48.519079 51.021078 56.025079 59.02208 64.02608 69.030078 71.028079 73.530078 76.52708 81.531078 84.03307 89.03707 92.03407 97.03807 102.04207 106.54207 111.54607 114.048069 116.550067 119.547069 124.55106 129.55507 134.55907 139.56307 144.56707 149.06707 153.56707 156.06906 158.57106 163.57506 168.07506 170.57706 175.07706 180.08106 185.08506 189.58506 191.58306 194.08506 196.08306 201.08705 206.09105 208.59305 213.59705 218.09705 220.59905 227.09705 232.10105 234.60305 240.60605 247.10405 253.60205 256.10408 262.10707 267.11106 269.61308 272.11509 274.6171 280.1161 285.1201 290.12409 292.6261 298.6291 303.6331 308.6371 310.35609 314.85609 317.3581 322.3621 325.3591 330.3631 335.3671 338.3641 343.3681 350.8651 358.36213 363.36613 368.37013 370.3681">times the external reference frequency, as specified by C5[PRDIV0]. The PLL's programmable</tspan><tspan y="116.43789" x=".000069999998 2.99707 8.001071 10.503071 15.5070719 18.504073 23.508072 28.512074 33.012075 38.016077 40.518075 45.522077 47.520078 52.020078 54.018079 59.02208 64.02608 67.02308 69.52508 77.02208 82.02608 86.52608 89.028079 91.530078 96.53407 101.53807 104.04007 108.54007 113.54407 118.548069 121.050067 123.048069 128.05207 133.05606 136.05306 141.05706 146.06105 148.56305 151.06505 156.06905 158.57105 163.57505 166.57204 171.57604 176.58003 181.58403 186.08403 191.08803 193.59003 198.59403 201.09603 205.59603 210.60002 212.59803 214.59603 219.60002 222.10202 228.10503 233.10903 238.11302 240.61502 243.61202 248.61602 251.11801 256.122 259.11903 264.12303 269.127 273.627 278.631 281.13304 285.63304 287.631 292.635 297.135 301.635 304.13703 306.63905 312.13804 317.14204 322.14604 324.64805 330.14704 335.15104 340.15504 342.65705 344.65504 349.15504 351.65705 356.66105 358.65904 363.15904 368.16304 373.16703 375.165 380.169 385.173 387.67503 389.673">reference divider must be configured to produce a valid PLL reference clock. The FLL is disabled in</tspan><tspan y="127.43789" x=".000069999998 5.0040709 7.506071 9.504071 14.508072 21.006073 24.003073 29.007073 34.011075 40.509077 45.513078 48.51008 51.012079 55.512079 58.014078 63.018079 65.52008 70.52408">a low-power state.</tspan></text>
|
|
<g clip-path="url(#clip_7)">
|
|
<path transform="matrix(1,0,0,1,54,425.25)" d="M.25 .25H100.55V173.25H.25Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 56.25 427.5)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 6.0030004 11.007001 16.011002 18.513003 24.516003 29.016003 34.020006 39.024007 43.524007 48.024007 53.028009 58.03201 60.534009 66.53701 71.03701 73.53901 78.54301 81.54001 86.54401 91.548007">PLL Bypassed External</tspan><tspan y="18.83789" x="0 2.997 9 15.003 21.006">(PBE)</tspan></text>
|
|
<g clip-path="url(#clip_8)">
|
|
<path transform="matrix(1,0,0,1,54,425.25)" d="M101.05 .25H503.75V173.25H101.05Z" fill="#ffffff" fill-rule="evenodd"/>
|
|
</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 157.05 427.5)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 6.0030004 11.007001 16.011002 18.513003 24.516003 29.016003 34.020006 39.024007 43.524007 48.024007 53.028009 58.03201 60.534009 66.53701 71.03701 73.53901 78.54301 81.54001 86.54401 91.548007 93.546009 96.048007 99.045009 105.048007 111.051 117.054 120.051 122.553 130.05 135.054 140.058 145.062 147.564 149.562 154.062 156.564 161.568 166.57199 169.07399 174.07799 177.07498 182.07898 187.08298 189.58498 196.08298 201.08698 206.09098 211.09497 213.59697 218.60097 220.59897 222.59697 225.09897 227.60097 232.60497 237.60897 240.11096 242.61296 247.61696 249.61496 251.61296 256.61698 263.11497 265.11296 270.11695 275.12095 277.62297 282.12297 287.12696 292.13096 297.13496 299.13294 301.63496 303.63294 308.63694 313.64094 318.14094 320.64295 325.64695 330.14695 334.64695 339.65095 342.64796">PLL Bypassed External (PBE) mode is entered when all the following conditions occur:</tspan><tspan y="24.23789" x="14.85 24.003 30.501002 35.505 38.007 44.505 49.509004 55.512 61.515 64.017 66.519 71.522998 73.520999 76.022998 80.522998 83.024997 88.02899 91.02599 96.02999 98.53199 105.02999 108.02699 110.024997 112.52699 115.02899 120.03299 125.03699 127.53899 130.04099 135.04499 137.54698 142.55098">•C1[CLKS] bits are written to 10</tspan><tspan y="40.63789" x="14.85 24.003 30.501002 35.505 38.007 40.509 47.007 53.010004 58.509004 64.512 67.014 69.516 74.52 76.518 79.02 81.521999 83.52 88.02 90.521999 97.02 100.017 102.015 104.517 107.019 112.022998 117.02699 119.52899 122.03099 127.03499 129.53699">•C1[IREFS] bit is written to 0</tspan><tspan y="57.037889" x="14.85 24.003 30.501002 35.505 38.007 44.010004 49.014005 54.018007 60.021005 62.523004 65.025 70.029 72.027 74.529 77.031 79.029 83.529 86.031 92.529 95.526 97.524 100.026 102.528 107.532 112.535999 115.037998 117.53999 122.54399 125.04599">•C6[PLLS] bit is written to 1</tspan><tspan y="73.43789" x="14.85 24.003 30.501002 35.505 38.007 43.011 49.014 51.516 54.017999 59.022 61.02 63.522 66.024 68.022 72.522 75.024 81.522 84.519008 86.517009 89.019008 91.521 96.525 101.529 104.031 106.533 111.536998 114.038997">•C2[LP] bit is written to 0</tspan><tspan y="99.83789" x="0 2.5020004 7.506001 10.008001 16.011002 22.014002 28.017003 30.519003 38.016004 43.020006 48.024007 53.028009 55.530008 58.032007 65.52901 72.02701 79.02901 86.031009 92.52901 98.02801 104.52601 109.53001 115.533008 118.035 120.033008 124.533008 127.035 132.039 137.043 140.04 142.038 146.538 151.54199 156.54599 159.04799 161.54999 164.54698 169.55098 177.04798 179.54998 182.05197 187.05597 192.05997 194.56197 201.56397 207.56697 214.06497 220.06798 226.07099 231.07498 233.57698 238.58098 243.08098 245.58298 250.58698 253.58397 258.58799 263.59199 265.58998 268.09199 271.089 276.093 278.595 283.599 286.596 291.6 296.604 301.104 306.108 308.61003 313.11003 315.108 320.112 324.612 329.112 331.614 334.11604 336.61805 341.62205 346.62605 349.12806 355.13105 360.13505 365.13905 367.64106 369.63905">In PBE mode, MCGOUTCLK is derived from the OSCSEL external reference clock; the PLL is</tspan><tspan y="110.83789" x=".00003 5.0040309 10.008032 15.0120329 18.009034 23.013035 25.515036 27.513035 32.517038 37.521039 42.52504 44.52304 47.02504 49.52704 54.53104 59.53504 62.03704 64.53904 66.53704 69.03904 73.53904 76.04104 81.04504 86.049037 88.55103 93.55503 98.55903 101.06103 103.56303 108.06303 110.06103 115.065029 119.565029 124.065029 126.567028 128.56502 133.06502 135.56702 140.57102 145.57501 148.07701 150.57901 155.58301 160.08301 165.087 170.091 172.593 175.095 180.594 185.59799 187.596 192.096 194.59799 202.09499 207.09899 212.10298 217.10698 219.60898 221.60698 226.10698 228.60898 233.61298 238.11298 243.11698 245.61898 250.62297 252.62097 255.12297 257.62498 262.62898 265.13099 270.13499 272.13298 274.13096 279.13496 285.63294 288.13496 290.63697 295.64097 300.64497 303.14698 309.14997 314.15397 319.15797 321.65998 324.162 329.166 331.668 336.672 341.172 346.176 351.18 353.17799 356.175 361.179 363.681 365.679 368.181 372.681 375.183 377.68504 382.68904 385.68605 390.69004 395.69404">operational, but its output clock is not used. This mode is useful to allow the PLL to acquire its target</tspan><tspan y="121.83789" x=".000069999998 2.5020705 5.49907 10.503071 15.5070719 20.511073 25.515072 30.519074 35.019075 39.519075 42.021074 48.519075 53.523077 55.521078 57.519079 62.52308 65.02508 72.52208 79.02008 86.02208 93.02408 99.52208 105.02108 111.51908 116.52308 122.52608 125.028079 127.02608 131.52608 134.02808 139.03208 142.02907 144.02707 148.52707 153.53107 158.53507 161.03707 163.53907 166.53606 171.54006 179.03705 181.53905 184.04105 189.04505 194.04904 196.55104 201.55504 206.05504 208.55704 213.56104 216.55803 221.56203 226.56603 228.56403 231.06603 234.06302 239.06702 241.56902 246.57302 249.57 254.574 259.578 264.078 269.082 271.584 276.084 278.082 283.086 287.586 292.086 294.588 297.09004 302.58903 307.59303 312.59703 315.09904 321.10203 326.10603 331.11003 333.61204 338.11204 340.11003 345.114 349.614 354.114 356.61604 359.11805 362.11506 367.11906 372.12306 377.12705 382.13105 387.13505 391.63505">frequency while MCGOUTCLK is driven from the external reference clock. The PLL clock frequency</tspan><tspan y="132.83789" x=".000069999998 1.9980701 7.002071 11.502071 16.002072 20.502072 23.004073 25.506073 30.510075 33.012075 38.016077 40.518075 48.015077 53.019079 55.01708 57.519079 59.51708 64.52108 66.51908 68.51708 73.01708 78.02108 80.52308 82.52108 87.52508 92.529079 95.031078 97.53307 102.53707 107.03707 109.53907 114.54307 117.54007 120.04207 122.54407 127.548069 132.04807 134.55007 139.05007 144.05406 149.05806 153.55806 155.55606 158.05806 160.05606 165.06006 170.06406 172.56606 177.57006 182.07006 184.57205 186.57006 189.07205 193.57205 196.07405 198.57605 204.57906 211.07706 213.57906 219.58206 222.08406 224.58606 227.08806 229.59006 231.58806 239.08506 244.08905 248.58905 251.09105 253.59305 258.59706 263.60105 266.10307 272.10606 277.11006 282.11405 284.61607 287.61308 292.61708 295.11909 300.12309 303.1201 308.12409 313.12809 317.62809 322.63209 325.1341 327.6361 330.63313 335.63713 340.6411 345.6451 350.6491 355.6531 360.1531 364.6531 367.15513 369.65715 374.66114">locks to a multiplication factor, as specified by its [VDIV], times the PLL reference frequency, as</tspan><tspan y="143.83789" x=".000069999998 4.50007 9.50407 14.508071 19.008072 21.006073 23.508074 25.506073 30.510075 35.514078 38.016077 43.020078 47.520078 50.022077 52.020078 54.522077 59.022077 61.524076 64.02608 70.029079 76.52708 83.02508 85.52708 91.530078 94.032077 96.53407 99.03607 101.53807 106.54207 109.04407 114.048069 117.04507 122.049068 127.05306 132.05707 135.05406 140.05806 142.56006 144.55806 149.56206 154.56606 157.06806 159.57006 164.57405 167.57105 170.07305 172.57505 175.57204 180.57604 185.58003 190.08003 192.07804 194.58003 196.57804 201.58203 206.58603 209.08803 211.59003 216.59403 219.09603 225.09903 231.10204 237.10504 239.60704 242.10904 244.61104 249.61504 254.61904 257.12104 263.12403 268.12803 273.13203 274.851 279.351 281.85304 286.85704 289.85404 294.85804 299.86204 302.85905 307.86305 315.36006 322.85707 327.86106 332.86506 334.86305 339.86705 342.36906 345.36607 350.37007 352.87208 357.87608 360.87309 365.87709 370.88108 375.38108">specified by its [PRDIV]. In preparation for transition to PEE, the PLL's programmable reference</tspan><tspan y="154.83789" x=".000069999998 5.0040709 7.002071 11.502071 13.500072 18.504073 23.508072 26.505072 29.007073 36.504076 41.508077 46.008077 48.510076 51.012075 56.016077 61.020078 63.522077 68.02208 73.02608 78.030078 80.532077 82.530078 87.53407 92.53807 95.53507 100.53907 105.54307 108.04507 110.547069 115.55106 118.05306 123.05706 126.05406 131.05806 136.06206 141.06606 145.56606 150.57006 153.07205 158.07605 160.57805 165.07805 170.08205 172.08005 174.07805 179.08205 181.58405 187.58705 192.59105 197.59505 200.09705 203.09404 208.09804 210.60004 215.60404 218.60103 223.60503 228.60903 233.10903 238.11302 240.61502 245.11502 247.11302 252.11702 256.617 261.117 263.61903 266.12104 271.62004 276.62403 281.62803 284.13005 289.62904 294.63304 299.63703 302.13905 304.13703 308.63703 311.13905 316.14305 318.14103 322.64103 327.64503 332.64903 334.647 339.651 344.655 347.157 349.155 354.159 356.661 361.665 364.16703 366.165 371.169 377.667">divider must be configured to produce a valid PLL reference clock. The FLL is disabled in a low-</tspan><tspan y="165.83789" x=".000069999998 5.0040709 10.008072 16.506073 21.510075 24.507075 27.009076 31.509076 34.011075 39.015077 41.517076 46.521078">power state.</tspan></text>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 54 604)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="180.95407 185.95807 190.96207 196.46106 198.45906 203.46306 205.96506 210.96906 215.97306 220.97705 223.47905 225.47705 230.48105 235.48505 240.48905 244.98905 247.49105 252.49504 257.49906 260.00108 262.50309 267.50709 272.51109 275.0131 280.0171 285.0211 289.5211 292.0231 294.52513 300.0241 305.0281 310.5271 315.5311 318.0331 320.53514">Table continues on the next page...</tspan></text>
|
|
<g clip-path="url(#clip_9)">
|
|
<path transform="matrix(1,0,0,1,54,73)" stroke-width="1" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M-.5 0H100.9"/>
|
|
</g>
|
|
<g clip-path="url(#clip_10)">
|
|
<path transform="matrix(1,0,0,1,54,73)" stroke-width="1" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M100.8-.5V16.5"/>
|
|
</g>
|
|
<g clip-path="url(#clip_11)">
|
|
<path transform="matrix(1,0,0,1,54,73)" stroke-width="1" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M101.4 16H-.5"/>
|
|
</g>
|
|
<g clip-path="url(#clip_12)">
|
|
<path transform="matrix(1,0,0,1,54,73)" stroke-width="1" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M0 16.5V-.5"/>
|
|
</g>
|
|
<g clip-path="url(#clip_13)">
|
|
<path transform="matrix(1,0,0,1,54,73)" stroke-width="1" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M100.7 0H504.5"/>
|
|
</g>
|
|
<g clip-path="url(#clip_14)">
|
|
<path transform="matrix(1,0,0,1,54,73)" stroke-width="1" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M504-.5V16.5"/>
|
|
</g>
|
|
<g clip-path="url(#clip_15)">
|
|
<path transform="matrix(1,0,0,1,54,73)" stroke-width="1" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M504.5 16H100.2"/>
|
|
</g>
|
|
<g clip-path="url(#clip_16)">
|
|
<path transform="matrix(1,0,0,1,54,89)" stroke-width=".5" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M100.8-.6V201.5"/>
|
|
</g>
|
|
<g clip-path="url(#clip_17)">
|
|
<path transform="matrix(1,0,0,1,54,89)" stroke-width=".5" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M101.15 201.15H-.25"/>
|
|
</g>
|
|
<g clip-path="url(#clip_18)">
|
|
<path transform="matrix(1,0,0,1,54,89)" stroke-width=".5" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M0 201.25V.4"/>
|
|
</g>
|
|
<g clip-path="url(#clip_19)">
|
|
<path transform="matrix(1,0,0,1,54,89)" stroke-width=".5" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M504 .4V201.25"/>
|
|
</g>
|
|
<g clip-path="url(#clip_20)">
|
|
<path transform="matrix(1,0,0,1,54,89)" stroke-width=".5" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M504.25 201.15H100.45"/>
|
|
</g>
|
|
<g clip-path="url(#clip_21)">
|
|
<path transform="matrix(1,0,0,1,54,290.15)" stroke-width=".5" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M100.8-.35V135.45001"/>
|
|
</g>
|
|
<g clip-path="url(#clip_22)">
|
|
<path transform="matrix(1,0,0,1,54,290.15)" stroke-width=".5" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M101.15 135.1H-.25"/>
|
|
</g>
|
|
<g clip-path="url(#clip_23)">
|
|
<path transform="matrix(1,0,0,1,54,290.15)" stroke-width=".5" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M0 135.20001V-.1"/>
|
|
</g>
|
|
<g clip-path="url(#clip_24)">
|
|
<path transform="matrix(1,0,0,1,54,290.15)" stroke-width=".5" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M504-.1V135.20001"/>
|
|
</g>
|
|
<g clip-path="url(#clip_25)">
|
|
<path transform="matrix(1,0,0,1,54,290.15)" stroke-width=".5" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M504.25 135.1H100.45"/>
|
|
</g>
|
|
<g clip-path="url(#clip_26)">
|
|
<path transform="matrix(1,0,0,1,54,425.25)" stroke-width=".5" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M100.8-.35V173.75"/>
|
|
</g>
|
|
<g clip-path="url(#clip_27)">
|
|
<path transform="matrix(1,0,0,1,54,425.25)" stroke-width=".5" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M100.9 173.5H-.25"/>
|
|
</g>
|
|
<g clip-path="url(#clip_28)">
|
|
<path transform="matrix(1,0,0,1,54,425.25)" stroke-width=".5" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M0 173.75V-.1"/>
|
|
</g>
|
|
<g clip-path="url(#clip_29)">
|
|
<path transform="matrix(1,0,0,1,54,425.25)" stroke-width=".5" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M504-.1V173.75"/>
|
|
</g>
|
|
<g clip-path="url(#clip_30)">
|
|
<path transform="matrix(1,0,0,1,54,425.25)" stroke-width=".5" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M504.25 173.5H100.7"/>
|
|
</g>
|
|
<g clip-path="url(#clip_31)">
|
|
<path transform="matrix(1,0,0,1,54,24.56929)" d="M0 0H504L488 16H0V0Z" fill="#666666"/>
|
|
<path transform="matrix(1,0,0,1,54,24.56929)" stroke-width=".8" stroke-linecap="butt" stroke-miterlimit="4" stroke-linejoin="miter" fill="none" stroke="#666666" d="M0 0H504L488 16H0V0Z"/>
|
|
</g>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 54 18)" font-size="9" font-family="HelveticaLTStd" font-weight="bold"><tspan y="26.01034" x="296.469 302.96699 308.46598 313.46998 318.96897 321.96598 326.96998 330.47099 332.973 337.977 342.981 345.483 352.98 358.479 360.98103 363.97804 366.48005 371.97904 377.47804 380.97904 386.47804 391.97703 396.98103 401.98503 404.48704 410.98503 413.48704 418.98603 423.99003 428.99403 431.49604 438.49806 443.50205 449.00105 454.00505 457.50605 462.51005 465.50706 471.00605 474.50706 477.00907 480.00608 487.50309 494.00108 501.00309">Chapter 25 Multipurpose Clock Generator (MCG)</tspan></text>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 54 734.93869)" font-size="10" font-family="HelveticaLTStd" font-weight="bold"><tspan y="8.59766" x="130.01 137.23 142.79 148.34999 151.12999 157.79999 163.90999 170.01999 173.34999 179.45999 185.01999 193.90999 196.68999 199.46999 205.02999 207.80998 215.02999 220.58998 223.91999 229.47998 233.36998 238.92998 245.03998 250.59998 256.15998 258.93998 267.26997 272.82997 278.93995 285.04994 290.60993 293.38993 296.16993 298.94993 306.16993 311.72993 317.28993 320.06993 322.8499 328.4099 331.1899 336.7499 342.8599 348.96989 351.74989 357.30989 362.86988 368.42988">K60 Sub-Family Reference Manual, Rev. 2 Jun 2012</tspan></text>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 54 751.756)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x=".00401 5.5030105 8.5000109 13.504011 18.50801 23.00801 27.50801 32.512014 34.510015 39.514017 42.016016 48.019014 53.023015 60.520017 62.518018 67.01802 72.02202 77.02602 82.030017 87.03401 91.53401 94.03601 99.04001 102.03701 104.53901 107.04101 109.54301 114.547008 119.047008">Freescale Semiconductor, Inc.</tspan></text>
|
|
<text fill="#ff0000" xml:space="preserve" transform="matrix(1 0 0 1 220.32 751.756)" font-size="10" font-family="HelveticaLTStd" font-weight="bold"><tspan y="8.59766" x="58.45 65.12 69.01 74.57 77.35 80.13 89.02 91.799999 97.909999 103.46999 107.35999">Preliminary</tspan></text>
|
|
<text xml:space="preserve" transform="matrix(1 0 0 1 391.68 751.756)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="151.308 156.312 161.316">585</tspan></text>
|
|
<text fill="#ff0000" xml:space="preserve" transform="matrix(1 0 0 1 54 763.756)" font-size="10" font-family="HelveticaLTStd" font-weight="bold"><tspan y="8.59766" x="180.87 188.65 194.20999 200.31999 205.87999 209.76999 215.32999 218.10999 220.88999 228.10999 234.21999 239.77999 242.55998 248.66999 254.22998 259.78999 265.34999 268.12998 270.90998 277.01997 280.34996 286.45994 290.34996 299.23997 304.79997 308.12995 310.90995 317.01994">General Business Information</tspan></text>
|
|
<g clip-path="url(#clip_32)">
|
|
<path transform="matrix(1,0,0,1,54,748.55599)" stroke-width=".4" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M0 0H166.42002"/>
|
|
</g>
|
|
<g clip-path="url(#clip_33)">
|
|
<path transform="matrix(1,0,0,1,54,748.55599)" stroke-width=".4" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M166.22 0H337.78"/>
|
|
</g>
|
|
<g clip-path="url(#clip_34)">
|
|
<path transform="matrix(1,0,0,1,54,748.55599)" stroke-width=".4" stroke-linecap="round" stroke-miterlimit="10" stroke-linejoin="miter" fill="none" stroke="#000000" d="M337.58 0H504"/>
|
|
</g>
|
|
<g transform="matrix(.26,0,0,.26,0,-.000019073487)">
|
|
<image id="image_35" width="288" height="154" xlink:href="data:image/png;base64,
|
|
iVBORw0KGgoAAAANSUhEUgAAASAAAACaCAIAAACGxwJwAAAACXBIWXMAAA7EAAAO
|
|
xAGVKw4bAAAM5klEQVR4nO2d22sd1xWHDYYaDC0uxaWUlogGAn4wCFroq/8E/wl+
|
|
aaFvAj009EBEm0JoSeKA01BTtQ5VLjg4luP2GFxfiyMaxfcYy0ZFvqqyghzZMr4o
|
|
RmW6rFMfjs6Z2bMv6zf7zMzvYz3r7Dlnf5rZa63Ze11CCIGxLvYACKkyFIwQIBSM
|
|
ECAUjBAgFIwQIBSMECAUjBAgFIwQIBSMECAUjBAgFIwQIBSMECAUjBAgFIwQIBSM
|
|
ECAUjBAgFIwQIBSMECAUjBAgFIwQIBSMECAUjBAgFIwQIBSMECAUjBAgFIwQIBSM
|
|
ECAUjBAgFIwQIBSMECAUjBAgFIwQIBSMECAYwW7vSaZH1OLaTsggnbh74vN//kkx
|
|
jl39qh0TM/eKuYi5+8udn3vki1OHT+/WismpnbPzI1HizsLOpYcnWlHMN2kPRrDP
|
|
tiXNdZoR3bHpkc///IM//PanWtH45N+dUYxjb5+81fmhv3z/teE//lglXh4dPH76
|
|
G5NfrOuHOHN505WZbTfnhhYW9zx6cr6AL9ZASQSTkLtiRKZHlg+u/+vvB0GCvXpo
|
|
5snT/0KvQG5ZXR+qKNhfmt+P7lVWXLg6MHN7x+LSOPTrzaI8gkksxftvJE+qzXXX
|
|
Pvg2SDCJj899iRv+4qOn4jBIsFf2bI1ukaVp8jy5slLQA3mLUgn2j03RHFsVTOLQ
|
|
rpdAgklcW3gMGv7oxGzvx2kJ9vdPvxldHvuQB8giNSuVYBKnBpOnhf4H+j/PBXsw
|
|
vmH0tZ+ABHv9yA3E2KfuPEz9OBXBdu0fiO6M392smIxI2QRrOVY8zwWTUMl2pM54
|
|
CVkp6Q5clnbiLUiwl0cHPz23Prot3iG3Mt1vu5cSCiZxcQdk2AY6BJPY+8ZWkGAS
|
|
sl5SHHjz0kLWB4ULNnb4u9ElCYyZ29i5VE7BJGTGF8lawf6z91s4wWS9pDXqufvL
|
|
hg8KFOx3H74UXY/+d6y0gjWLTdyvFUzi2Ds/AgkmcfbWksqouwpfuoId/tfG6G5o
|
|
xc25IZUvvJcyC9YsMHHfI9jywfUh2Q6zYCplsYmZe+ZPCRFs9yc/jG6FboAKZSUX
|
|
rLDEfY9gElfGNoMEawSXxVILX1qClT23kRpnLm9C5O5LLpjE8YEiEvdpgkkceGsL
|
|
SLBGWFnsvcm53L/vLdj+k5ui+4AIRFKx/II1CymOZQi2sG8jTjDvslhW4UtFsMrk
|
|
NlJj+evrqvOmGoI18Yn7DMEkTu1+ASRYw6ssZih8qQjWP029iFC/iVVFMIkpVCLo
|
|
GdmC+TUBWwrWcC+LGQpf4YL1c1OvSshKTHfiVEiwJjJxny1Y4tUEbC+YU1nMXPgK
|
|
FKwsTb2BoZtOrJZgEndPQK7IKFjinu2w16DhUhYzF74CBStXU6936NadKycYKHGf
|
|
J5hrE7CTYJZlsdzCV4hgb370YvSpX0xcuDqgOHEqJ1gTk7jPEyxxbAJ2MqFhURaz
|
|
KXx5C1bJwpchFHOJVRSsCUjcWwgmYZ/tcBWskVcWsyl8eQtWgaZep1BchlVUsKZ2
|
|
4t5OMPsmYA/BDGUxy8KXn2Cvjm2xnJdXZrahQ57fChBMMVlfXcF0HbMTLLFuAvbw
|
|
oZFRFrMvfPkJZt/Uq/ZtW/DoyfmFxT3TN7YjBFPMc1RasKZe4t5aMMsmYD/BGmll
|
|
MfvCl4dgTk29Ol+1I7JekjubrmDyB7WGV3XBJOY1nqetBZO4+O73cIJ1lcWcCl+u
|
|
grnmNhS+Z1/knqMo2KVptbfmayCYSuLeRbDE4pVnbyskZMXVHpdT4ctVsL1Hv+M0
|
|
L0O/5ABWVu7pLs+0BlYDwVqOBSYVHQXLbQIOEaxdFnMtfDkJ5tHUqzN5fJElGQWL
|
|
F4GJe0fBkrwm4BAxJGTdJY65Fr6cBPNo6tWbQJ6cuaz2Ho3WkGojmMSZ7f5X5C6Y
|
|
OdsRKJhEyMNhrmB+Tb16E8gTxWyH1pDqJFgzIHHvLlhibAIOFyw8sgR7Zc9Wv74N
|
|
1Tnkw825IQoWO/wS916CJdlNwNHtMgjm3dSrPIvcmZ0foWB9EB6O+Qr2YHxDuQQL
|
|
aerVn0iOULD+CI/Eva9gSUYTcHS7UgULPIUIMpdcoGB9E+LY4+sOVxQgWJLWBBzd
|
|
rlTBApt6IXPJBQrWT+GUuA8TrLcJOLpdvYLZN/VSMHvKIJj8tYs7II59Zt1yFiZY
|
|
0nPuUXS7egULf2EZMpdcoGABGsgNB+GYZeI+WLCuslh0u7oEU9mpFzKXXFDsSNQa
|
|
UnkEk8c5kGM2B0AHC5asbQKOblenYFovLEPmkgssNAcIJiydf5acQDiWm7jXECzp
|
|
aAKOblenYK5NvX0rmJZddRUsWXUMIVhu4l5JsHa2I7pdbcEUd+qFzCVrFpfGKViw
|
|
YILcbUCOGRL3SoIlz5uAo9vVFkzxFCLIXLJG95UwrVGVULBEc7qvCUPiXu8TW9mO
|
|
6Ha1BNPdqRcyl+xY/vq64oXUXjABlLjPOgBaVekrY5uj2yXxm32/1t2MDTKX7FDf
|
|
NUBrYKUVLCk2ca8q2MK+jdHtknjjb7/qz0npiu7D4aTqDvVlFgyXuO89AFpVsANv
|
|
bYluV2P1EVH3pC/IXDKC2PFmsnab3hj6LR5fLyhxrydYqxoW3a6WYLpb9i49PFFM
|
|
LC6Nz86PgPZso2BrwRXHOhP3SoK1+zmi29V4nkWs3mnL4VGzjUdzOwZxifu2Y0qC
|
|
tbcljW5Xo6PQrJipr0bUbOtsm5bcazshjrUT9xqCdfbUR7erU7DwPvqKRc0Of7Ds
|
|
eYcm7jUE63wrLLpdjbXNvnU73sEQ9Tu+yP6lEtB7aKJusGBd7zVHt6tLsLodUGSI
|
|
+h3AZy8YLnEflkfpPZ4vul2NnvfBdu0fiD65+yHqd4SsvWAJMnEfEF1vW/anYCrv
|
|
XJY9ankIupNgCTJx7xWpuyNGtytVsJocc26Im3NDuipUUTBhfjy6V61YPrg+9djL
|
|
6HalCua9p29lQjF/2KKigiWw4phjZB3cHN2uLMECd24rdeimN1pUV7AElri3DsMZ
|
|
K9HtyhJM9xXMEoWsvlZWVM/1XqXSgglntkcULGvf7D4XTEK3CbgUcWfBYmsWd6ou
|
|
GC5xnxdXxjbjji8anZi9tvAYJ5j3+Q8lDcXu3i6qLliy6ljhScXck5oD3Zi7vyxX
|
|
9vG5L0GC1aoJ+NL0IOLhsEUNBEsiJO7bTb0IwZqXFlqXFXgGX+4RsnVoApal16Mn
|
|
wScMZ1MPwZJCE/e9G2UrCvb6kRut82NbnL21hBOs8tmOC1cHoHYlNRIsKS5xn3sC
|
|
eohgnSegt5D1GEiwajcBy7oL92TYpk6CJUUk7rMKXyqCvTc513tNi4+e4gSrZBOw
|
|
PBaCcoa91EywBOtYb1OvomCy3BKXUq/p2NWvQIJVrAlY1Jq5vaOAG1eb+gmGTNz3
|
|
NvUqCjYxY5oWsjYDCVaNJuBL04Ny1ypSrRb1EyxZdez4gLpdNrkNb8HePnnLfE0e
|
|
ZTF7wcr4yrMssSRm50cWl8aL96pNLQVL9BP3WU29WoK1Cl9mXMti9oIN2zUB6/9M
|
|
5aeuggl3TygO0jK34SdYu/BlxrUs5iSYTRMw5GcqOTUWLFFL3D8Y3+Bkl5NgXYUv
|
|
M05lMSfBJN786EUK5kq9BROmhsJHaGjqDRest/Blxr4s5irYcF4TMOgnKjW1FywJ
|
|
Tdybm3oDBUstfJmxL4t5CGZuAkb8OGWHggUl7nObekMEMxS+zFiWxTwEM2c71H+Z
|
|
CkDBVvF1rHWaHkgwc+HLjE1ZzE+w4ewmYMUfpDJQsOe4J+6dCl+uguUWvszYlMW8
|
|
BctqAtb6KaoEBevA8QBom6Zeb8FsCl9mcsti3oINZ5ybrvIjVAwKthbrxH3rFCKQ
|
|
YJaFLzO5ZbEQwVKbgMPHXD0oWA8Wu2TbN/V6COZU+DJjLouFCDac1gSsMuaKQcHS
|
|
yEvc2zf1egjmWvgyYyiLBQo23NMErDjsykDBMshOKobkNnIF8yh8mZG1HE6wriZg
|
|
3ZFXAwqWQXbi3qmp10kw78KXmayyWLhgw2tfeVYfeQWgYNmkJe5dm3qdBBMTENch
|
|
K7rUspiKYJ1NwIjBlx0KZmRt4t6jqddesMDCl5nUspiKYMMdTcC48ZcXCpZHR+Le
|
|
o6nXXjBxAHodsroDCdbOdkDHX1IomAWrB0CnnkKkJZhK4ctMb1lMUbBWEzD6EsoI
|
|
RrCpoWdWaMWU8pFNfld06IOfHRj7hVaMTsx2hlbhy8zZW0udH7r76PvvHPy5Vhw9
|
|
vb2ASygdvK0TAoSCEQKEghEChIIRAoSCEQKEghEChIIRAoSCEQKEghEChIIRAoSC
|
|
EQKEghEChIIRAoSCEQKEghEChIIRAoSCEQKEghEChIIRAoSCEQKEghEChIIRAoSC
|
|
EQKEghEChIIRAoSCEQKEghEChIIRAoSCEQKEghEChIIRAoSCEQKEghEChIIRAuR/
|
|
5TMAQ7zJBDQAAAAASUVORK5CYII="/>
|
|
</g>
|
|
</svg>
|