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Ryan Malloy 5252d1d73c Add hardware reference docs (A3981, K60, RYS352A) 
Allegro A3981 stepper motor driver: datasheet, KiCad symbols/footprint,
3D model (TSSOP-28). Two per G2 board, SPI-controlled, AUTO microstep.

NXP MK60DN512VLQ10 (Kinetis K60): datasheet and 1300-page reference
manual. Cortex-M4 96MHz MCU running the G2 firmware.

Reyax RYS352A GPS module: datasheet and PAIR command guide.
GPS receiver on the G2 board (used for auto-location/satellite lookup).

All extracted as markdown + page images + vector SVGs for LLM context.
Binary assets (PDFs, PNGs, SVGs, STEP, WRL) stored via git-lfs.
2026-02-14 18:36:42 -07:00

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28 KiB (Stored with Git LFS)
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<text xml:space="preserve" transform="matrix(1 0 0 1 54 82)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x="0 8.340001 16.680003 20.850003 29.190003 33.360006 41.700006 45.870008">14.4.3.1</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 122.3833 82)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x="0 10.830001 21.660002 32.49 36.660005 49.995004 59.160005 68.325008">RUN mode</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 54)" font-size="14" font-family="TimesLTStd"><tspan y="64.25" x=".001 8.555 15.555 19.447 24.893002 28.393002 32.285005 37.731004 41.231004 45.123006 52.123006 58.339006 61.839006 68.839008 75.839008 80.50101 91.393009 97.60901 101.50101 105.00101 112.00101 119.00101 125.21701 129.87902 136.09502 139.98702 143.87902 150.87902 157.87902 161.37902 172.27101 179.27101 186.27101 192.48702 195.98702 200.64902 207.64902 212.31102 215.81102 219.70302 226.70302 232.91902 236.41902 243.41902 249.63503 256.635 260.527 266.743 272.959">This is the normal operating mode for the device.</tspan><tspan y="88.65" x=".001 8.555 15.555 19.447 24.893002 28.393002 39.285005 46.285005 53.285005 59.501005 63.001005 66.893009 72.339008 75.839008 81.285 87.50101 91.393009 97.60901 103.82501 107.71701 113.933017 120.933017 124.433017 130.64902 135.31102 139.20302 145.41902 150.08103 153.58103 159.79703 166.79703 173.79703 177.29703 181.95903 188.17504 193.62104 199.83704 203.72904 207.22904 210.72904 223.94504 230.94504 237.16104 244.16104 247.66104 251.55304 258.55305 264.76905 268.26905 278.37705 287.71507 300.16108 303.66108 310.66108 315.32307 322.32307 328.53907 334.75508 340.20109 345.6471 352.6471 357.30909 360.80909 367.0251 374.0251 377.91709 381.80909 387.2551 390.7551 395.41709 401.6331 407.0791 413.2951 417.1871 420.6871 424.1871 428.0791 431.9711 435.4711 440.9171 447.13313 451.02513 456.47114 459.97114 466.97114 473.97114 477.47114 481.36314 488.36314">This mode is selected after any reset. When the ARM processor exits reset, it sets up the</tspan><tspan y="104.65" x=".00103 5.4470307 9.339031 15.555032 21.771033 28.771033 32.271036 35.771036 42.771036 47.433034 54.433034 61.433034 66.09503 72.311038 83.20303 86.70303 92.91904 99.91904 106.91904 113.91904 117.811038 124.02704 128.68904 132.18904 136.85105 144.63504 153.97304 158.63504 162.13504 165.63504 171.85105 178.85105 185.85105 189.35105 193.24304 197.13504 204.13504 211.13504 214.63504 219.29705 225.51305 232.51305 236.40505 241.85105 245.74304 251.95905 256.62104 260.12104 264.78303 273.337 282.67503 287.337">stack, program counter (PC), and link register (LR):</tspan><tspan y="129.05" x="13.10502 23.99702 32.55102 39.55102 45.76702 49.26702 56.26702 60.92902 67.929019 74.14502 80.36102 85.80702 91.25302 98.25302 102.91502 106.41502 111.07703 117.29303 123.50903 130.50904 135.95503 139.45503 143.34703 150.34703 156.56304 160.06304 165.50904 169.40103 175.61704 180.27904 184.17104 187.67104 195.45503 203.23903 206.73903 211.40103 219.18503 226.96903 233.96903 244.86103 251.07703 254.96903 261.96903 266.631 270.131 274.793 279.455 286.455 297.347 300.847 307.847 314.063 320.279 324.171 331.171 335.83299 340.49497 344.38697 350.60298 357.60298 361.49497 367.71098 371.21098 378.21098 382.87297 387.53495 392.98097 399.19697 403.08897 406.58897 413.58897 420.58897 427.58897 434.58897">&#x2022;The processor reads the start SP (SP_main) from vector-table offset 0x000</tspan><tspan y="145.05002" x="13.105049 23.997052 32.551054 39.551054 45.76705 49.26705 56.26705 60.92905 67.92905 74.14505 80.36105 85.80705 91.25305 98.25305 102.915058 106.415058 111.07706 117.29306 123.50906 130.50907 135.95507 139.45507 143.34706 150.34706 156.56307 160.06307 165.50907 169.40106 175.61707 180.27907 184.17107 187.67107 195.45507 204.79306 208.29306 212.95507 217.61707 224.61707 235.50907 239.00907 246.00907 252.22507 258.44108 262.33308 269.33308 273.99507 278.65705 282.54905 288.76506 295.76506 299.65705 305.87306 309.37306 316.37306 321.03504 325.69703 331.14305 337.35905 341.25105 344.75105 351.75105 358.75105 365.75105 372.75105">&#x2022;The processor reads the start PC from vector-table offset 0x004</tspan><tspan y="161.05002" x="13.105079 23.99708 32.55108 41.88908 45.38908 49.281084 54.72708 58.22708 63.67308 69.889087 73.78108 77.28108 81.17308 88.17308 91.67308 98.67308 105.67308 113.457088 121.24109 129.02509 136.80908 143.80908 151.59308 159.37708 167.16107 174.94507">&#x2022;LR is set to 0xFFFF_FFFF.</tspan><tspan y="187.05002" x=".0010890961 8.555089 15.555089 19.055088 23.717089 29.93309 36.93309 43.93309 50.14909 56.36509 59.86509 66.86509 73.86509 83.97309 90.189098 94.8511 98.3511 102.243099 109.243099 112.743099 116.63509 123.63509 127.52709 132.9731 136.4731 147.3651 154.3651 161.3651 167.5811 171.0811 174.5811 181.5811 185.4731 190.9191 197.1351 204.1351 208.0271 214.2431 217.7431 221.6351 228.6351 234.8511 238.3511 244.56711 248.4591 255.4591 261.6751 268.6751 274.12113 277.62113 281.51313 288.51313 292.01313 299.01313 306.01313 313.01313 318.45915 324.67515 331.67515 335.17515 346.06715 353.06715 360.06715 367.06715 370.95915 377.17515 382.62117 386.12117 393.12117 398.56718 402.45918 409.45918 416.45918 419.95918 423.85118 430.85118 437.06718 440.95918">To reduce power in this mode, disable the clocks to unused modules using their</tspan><tspan y="203.05002" x=".0010890961 6.2170898 13.21709 17.87909 22.54109 28.757092 34.20309 41.20309 48.20309 55.20309 62.20309 66.09509 73.09509 80.09509 83.59509 89.8111 93.703098 100.703098 106.9191 113.9191 117.4191 124.4191 130.6351 134.5271 138.4191 145.4191 152.4191 155.9191 162.1351 169.1351 176.1351 180.0271 184.6891 191.6891 195.5811 199.0811 206.0811 209.9731 213.8651 219.3111 222.8111 226.7031 233.7031 237.2031 241.0951 248.0951 254.3111 257.8111 265.5951 270.25709 282.7031 285.22309 290.6691 294.1691 298.8311 305.0471 312.0471 315.9391 321.3851 325.2771 331.4931 336.1551 341.6011">corresponding clock gating control bits in the SIM's registers.</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 297.6)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x="-.0039 8.336102 16.676102 20.846102 29.186104 33.356107 41.696107 45.866109">14.4.3.2</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 122.3833 297.6)" font-size="15" font-family="HelveticaLTStd" font-weight="bold"><tspan y="11.89648" x="-.0039 10.0011019 18.341103 24.176104 32.516107 37.511106 46.676107 55.841108 67.51111 71.68111 81.68611 90.85111 102.52111 110.861118 116.69611 120.86611 131.6961 140.8611 150.0261 154.19609 159.19109 169.19609 178.36109 188.36609 199.19609 204.19109 208.36109 221.69609 230.86109 240.02608">Very-Low Power Run (VLPR) mode</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 54)" font-size="14" font-family="TimesLTStd"><tspan y="279.85" x=".00612 4.6681206 11.66812 15.16812 25.276122 33.83012 41.61412 50.95212 54.45212 65.344127 72.344127 79.344127 85.56013 89.06013 92.56013 96.452129 103.452129 109.66813 113.16813 120.16813 127.16813 131.83013 138.04613 145.04613 148.93813 155.93813 159.43813 166.43813 173.43813 177.33013 181.22212 187.43813 194.43813 200.65413 204.15413 208.81613 215.03214 222.03214 229.03214 232.92414 239.14014 243.03214 250.03214 254.69414 258.19416 262.08616 267.53218 271.03218 278.03218 285.03218 288.92417 292.42417 296.31617 303.31617 307.20817 314.20817 317.70817 323.92417 327.42417 332.87019 336.76219 343.76219 350.76219 354.26219 365.15419 372.15419 379.15419 385.37019 388.87019 393.53218 399.74818 406.74818 413.74818 417.64018 423.85618 427.74818 431.64018 438.64018 445.64018 449.14018 454.58619 458.47819 464.69419 468.58619 474.8022 478.3022 481.8022 486.46418">In VLPR mode, the on-chip voltage regulator is put into a stop mode regulation state. In</tspan><tspan y="295.85" x=".00617 3.8981705 10.89817 14.790171 20.236172 23.736172 29.182173 33.074174 39.290174 43.182176 49.398176 52.898176 56.398176 60.290178 67.29018 73.50618 77.00618 81.66818 87.884189 94.884189 101.884189 105.776187 111.99219 115.884189 122.884189 127.54619 131.04619 134.93819 140.38419 143.88419 150.88419 157.10019 162.54619 166.43819 173.43819 180.43819 186.65419 193.65419 197.15419 201.04619 208.04619 211.54619 216.99219 223.99219 230.99219 237.99219 241.88419 248.88419 252.38419 258.6002 265.6002 272.6002 279.6002 286.6002 293.6002 297.1002 303.3162 310.3162 314.97819 319.64018 325.85618 332.85618 336.74818 340.24818 344.14018 351.14018 354.64018 358.53218 365.53218 371.74818 375.24818 387.69419 397.0322 407.1402 410.6402 417.6402 424.6402 430.8562 435.5182 439.0182 445.2342 448.7342 453.39619 459.61219 466.61219 473.61219 479.8282 486.0442">this state, the regulator is designed to supply enough current to the MCU over a reduced</tspan><tspan y="311.85" x=".00617 4.66817 9.33017 15.54617 22.54617 29.54617 35.76217 42.76217 48.97817 55.97817 59.47817 62.97817 71.532169 78.532169 82.032169 86.69417 93.69417 98.35617 102.24817 109.24817 115.46417 120.126178 123.626178 128.28818 134.50418 141.50418 148.50418 154.72019 160.93619 164.43619 171.43619 178.43619 188.54419 194.7602 199.4222 202.9222 206.8142 213.8142 217.3142 221.20619 228.20619 232.09819 237.54419 241.04419 251.93619 258.9362 265.9362 272.1522 275.6522 279.1522 286.1522 290.0442 295.4902 301.7062 308.7062 312.5982 318.8142 322.3142 326.2062 333.2062 339.4222 342.9222 349.1382 353.0302 360.0302 366.24623 373.24623 378.69224 382.19224 386.08424 393.08424 396.58424 403.58424 410.58424 417.58424 423.03025 429.24626 436.24626 439.74626 450.63825 457.63825 464.63825 471.63825 475.53025 481.74626">frequency. To further reduce power in this mode, disable the clocks to unused modules</tspan><tspan y="327.85" x=".00617 7.00617 12.45217 16.344172 23.344172 30.344172 33.84417 37.73617 44.73617 50.95217 54.844175 59.506174 63.006174 69.222179 76.222179 80.88418 85.54618 91.762187 97.20818 104.20818 111.20818 118.20818 125.20818 129.10019 136.10019 143.10019 146.60019 152.8162 156.70819 163.70819 169.9242 176.9242 180.4242 187.4242 193.6402 197.5322 201.4242 208.4242 215.4242 218.9242 225.1402 232.1402 239.1402 243.0322 247.6942 254.6942 258.5862 262.0862 269.0862 272.9782 276.8702 282.31623 285.81623 289.70823 296.70823 300.20823 304.10023 311.10023 317.31623 320.81623 328.60023 333.2622 345.70823 348.2282 353.67424 357.17424 361.8362 368.05223 375.05223 378.9442 384.39024 388.28224 394.49824 399.16023 404.60624">using their corresponding clock gating control bits in the SIM's registers.</tspan><tspan y="352.25" x=".00617 9.344172 15.560172 20.222172 27.222172 31.884173 38.100175 41.600175 47.816175 54.816175 58.708177 64.92418 69.58618 73.47818 80.47818 87.47818 90.97818 94.87018 101.87018 105.76218 111.208179 114.708179 125.600177 132.60018 139.60018 145.81618 149.31618 152.81618 156.70818 163.70818 169.92418 173.42418 178.08618 185.08618 188.97818 192.87018 199.87018 209.97818 213.87018 220.87018 227.87018 231.37018 237.58618 244.58618 251.58618 258.58619 262.47819 266.37019 270.26219 277.26219 284.26219 289.7082 293.2082 304.1002 311.1002 316.5462 320.4382 323.9382 330.9382 337.1542 340.6542 351.5462 357.7622 361.6542">Before entering this mode, the following conditions must be met:</tspan><tspan y="376.65" x="13.09616 24.002161 32.55616 39.55616 45.77216 49.27216 61.718164 71.05617 81.16417 84.66417 95.55617 102.55617 108.00217 111.894168 115.394168 122.394168 128.61017 132.11017 138.32617 145.32617 152.32617 156.98818 160.88018 167.88018 174.88018 179.54218 185.75818 192.75818 196.25818 200.15018 207.15018 210.65018 216.86618 220.36618 231.25818 238.25818 245.25818 251.47418 254.97418 265.08219 272.08219 275.97419 282.1902 289.1902 292.6902 296.58219 302.0282 305.5282 310.9742 317.9742 324.9742 331.9742 338.9742 343.6362 347.5282 353.7442 360.7442 364.2442 371.2442 378.2442 382.9062 386.7982 393.7982 400.7982 404.2982 414.4062 422.96018 430.74418 440.08219 443.58219 447.08219 454.86619 461.08219 467.2982 470.7982 474.6902 481.6902">&#x2022;The MCG must be configured in a mode which is supported during VLPR. See the</tspan><tspan y="392.65" x="24.00218 31.78618 38.78618 48.89418 55.11018 59.77218 63.27218 75.71818 81.93418 88.93418 95.150188 102.150188 108.36619 119.25819 125.47419 132.47418 136.36618 139.86618 146.86618 153.08219 156.97418 163.19019 167.08219 170.97418 176.42018 179.92018 184.58219 191.58219 196.24419 199.74419 203.63619 210.63619 215.29819 222.29819 226.96019 237.85219 244.06819 247.96019 251.85219 258.85218 265.85218 269.35218 275.56819 282.56819 289.56819 296.56819 300.46018 303.96018 307.85218 314.85218 321.06819 326.5142 332.7302 336.2302 348.6762 358.01423 368.12223 371.62223 382.51423 389.51423 396.51423 402.73023 408.17625">Power Management details for information about these MCG modes.</tspan><tspan y="408.65" x="13.09622 24.00222 34.11022 38.002225 41.894227 45.394227 51.610227 55.502229 62.502229 68.71823 75.71823 79.21823 90.11023 97.11023 104.11023 108.00223 111.894229 118.894229 123.55623 129.00223 132.50223 136.39423 143.39423 146.89423 150.78623 157.78623 164.00223 167.50223 179.94823 189.28623 199.39423 202.89423 213.78623 220.78623 226.23223 230.12422 233.62422 240.62422 246.84023 250.34023 257.3402 261.2322 266.67823 272.89424 279.89424 283.78623 290.00224 297.00224">&#x2022;All clock monitors in the MCG must be disabled.</tspan><tspan y="424.65" x="13.09622 24.00222 32.55622 39.55622 45.77222 49.27222 60.164224 66.380229 73.380229 77.272228 88.16422 95.16422 106.05622 109.55622 114.21822 118.880229 125.09623 132.09622 139.09622 145.31223 152.31223 158.52823 162.42023 168.63623 174.08223 177.58223 184.58223 189.24423 192.74423 196.63623 203.63623 209.85224 213.35224 218.79824 225.79824 231.24423 235.13623 241.35224 252.24423 255.74423 259.24424 266.24424 273.24424 278.69026 282.19026 285.69026 290.35224 294.24424 300.46025 305.90626 312.90626 316.40626 319.90626 326.12226 333.12226 340.12226 343.62226 349.83827 356.83827 361.50025 367.71626 371.21626 377.43226 382.09425 388.31025 391.81025 396.47224 402.68824 408.13426 412.02626 416.68824 420.58024 426.79624 430.68824 436.90425 443.90425 447.40425 450.90425 458.68824 464.90425 471.12025 474.62025 478.51225 485.51225">&#x2022;The maximum frequencies of the system, bus, flash, and core are restricted. See the</tspan><tspan y="440.65" x="24.00224 31.78624 38.78624 48.89424 55.11024 59.77224 63.27224 75.71824 81.93424 88.93424 95.150249 102.150249 108.36625 119.25825 125.47425 132.47425 136.36624 139.86624 146.86624 153.08225 156.97425 163.19025 167.08225 170.97425 176.42024 179.92024 186.13625 193.13625 200.13625 207.13625 211.02825 214.52825 224.63625 231.63625 235.52825 241.74425 248.74425 252.24425 256.90626 261.56825 267.78425 274.78425 281.78425 288.00025 295.00025 301.21626 305.10826 311.32426 316.77027 320.27027 326.48628 331.14826 337.36427 340.86427 346.31028 353.31028 360.31028 367.31028 374.31028 378.97227 382.86427 389.08027 396.08027">Power Management details about which frequencies are supported.</tspan><tspan y="456.65" x="13.096219 24.00222 36.44822 43.44822 50.44822 56.66422 60.16422 67.164218 71.82622 78.82622 82.718219 88.93422 95.15022 99.04222 102.93422 109.93422 116.93422 120.43422 131.32622 138.32622 143.77222 147.66422 151.16422 158.16422 164.38022 167.88022 173.32622 179.54222 183.43422 186.93422 190.82622 197.82622 201.32622 207.54222 211.43422 215.32622 222.32622 232.43422 235.93422 246.04222 254.59622 262.38023 265.88023 276.77223 283.77223 290.77223 296.98823 302.43424 305.93424 309.43424 313.32624 320.32624 326.54225 330.43424 333.93424 337.82624 343.27226 346.77226 350.27226 358.05625 370.50227 378.28627 387.62428 397.73228 406.28627 410.94825 421.05625 431.16426 439.71824 447.50224 452.1642 455.6642 459.5562 465.00224 468.50224 475.50224">&#x2022;Mode protection must be set to allow VLP modes, that is, PMPROT[AVLP] is 1.</tspan><tspan y="472.65" x="13.096219 24.00222 31.78622 44.232225 53.570226 62.124227 71.46223 80.01623 84.67823 94.016239 104.12424 114.23224 126.67824 131.34024 134.84024 138.73224 144.17824 147.67824 153.12424 159.34024 163.23224 166.73224 170.62424 177.62424 181.12424 188.12424 195.12424 202.12424 205.62424 209.51624 216.51624 220.01624 226.23224 233.23224 237.12424 243.34024 248.00225 251.50225 261.61024 270.1642 277.9482 287.28623">&#x2022;PMCTRL[RUNM] is set to 10b to enter VLPR.</tspan><tspan y="488.65" x="13.096219 24.00222 31.78622 35.678224 41.894224 47.34022 54.34022 57.84022 64.840229 69.50223 76.50223 83.50223 88.16423 94.38023 105.27223 116.16423 120.05623 127.05623 134.05623 137.94823 144.16423 148.82624 155.04224 160.48824 164.38024 171.38024 178.38024 181.88024 185.77223 191.21823 194.71823 201.71823 208.71823 212.61023 216.11023 222.32624 226.21823 230.11023 237.11023 247.21823 253.43424 260.43424">&#x2022;Flash programming/erasing is not allowed.</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 54)" font-size="14" font-family="HelveticaLTStd" font-weight="bold"><tspan y="514.4367" x="232.56024 242.66825 253.56024 262.11424">NOTE</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 54)" font-size="14" font-family="TimesLTStd"><tspan y="530.64999" x="71.99422 82.10222 89.10222 92.60222 99.60222 106.60222 110.49422 113.99422 120.21022 127.21022 133.42623 140.42623 147.42623 153.64223 157.14223 161.03423 168.03423 174.25023 177.75023 183.96623 187.85823 194.85823 201.07424 208.07424 211.57424 216.23624 220.89824 227.11425 234.11425 241.11425 247.33025 254.33025 260.54624 267.54624 271.04624 281.15425 288.15425 292.04624 295.93824 302.15425 305.65425 309.54624 316.54624 320.04624 330.15425 338.70823 346.49223 355.83024 359.33024 370.22224 377.22224 384.22224 390.43824">Do not change the clock frequency while in VLPR mode,</tspan><tspan y="546.64999" x="71.994197 78.994197 85.2102 91.4262 97.642208 104.642208 110.0882 116.30421 119.80421 123.696208 130.6962 136.9122 140.4122 145.0742 151.2902 158.2902 165.2902 169.1822 175.39821 179.2902 186.2902 190.95221 194.45221 198.34421 203.7902 207.2902 212.7362 216.6282 223.6282 233.7362 237.2362 241.89821 248.11421 253.56021 260.5602 267.5602 274.5602 281.5602 285.4522 292.4522 299.4522 302.9522 309.1682 316.1682 323.1682 326.6682 332.88423 339.10023 346.10023 353.10023 360.10023 363.99223 367.49223 378.38423 384.60023 391.60023 397.81623 404.81623">because the regulator is slow responding and cannot manage</tspan><tspan y="562.64999" x="71.994197 76.6562 82.8722 88.3182 92.2102 95.7102 99.602199 106.602199 112.8182 119.8182 123.3182 127.2102 131.8722 138.0882 145.0882 150.5342 154.4262 158.31819 162.21019 169.21019 176.21019 181.65619 185.15619 188.65619 193.31819 200.31819 203.81819 210.0342 217.0342 224.0342 227.9262 231.81819 235.71019 242.71019 249.71019 253.21019 256.7102 263.7102 270.7102 274.2102 281.2102 288.2102 292.1022 295.6022 306.4942 313.4942 320.4942 324.3862 329.0482 336.0482 339.5482 343.4402 350.4402 356.6562 360.1562 366.3722 370.2642 377.2642 383.4802 390.4802 393.9802 399.4262 406.4262 413.4262 418.0882 424.3042">fast load transitions. In addition, do not modify the clock source</tspan><tspan y="578.64999" x="71.994197 75.88619 82.88619 86.38619 90.27819 97.27819 103.494197 106.994197 119.44019 128.7782 138.8862 142.3862 153.2782 160.2782 167.2782 174.2782 178.1702 184.3862 187.8862 191.3862 195.2782 202.2782 208.4942 211.9942 222.8862 229.8862 236.8862 243.8862 247.7782 253.9942 257.4942 263.7102 267.6022 274.6022 280.8182 287.8182 291.3182 297.5342 304.5342 310.7502 317.7502 321.6422 327.85823 333.30424 336.80424 340.69624 347.69624 351.19624 355.08824 362.08824 368.30424 371.80424 379.58824 384.2502 396.69624 400.19624 403.69624 410.69624">in the MCG module, the module clock enables in the SIM, or</tspan><tspan y="594.64999" x="71.994228 78.21023 85.21023 92.21023 95.71023 101.92623 105.81823 112.81823 119.03423 126.03423 129.53424 136.53424 140.42624 147.42624 151.31824 158.31824 164.53424 169.19625 172.69625 177.35825 183.57425 190.57425 194.46625 199.91225 203.80425 210.02025 214.68225 220.12825">any clock divider registers.</tspan></text>
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<text xml:space="preserve" transform="matrix(1 0 0 1 54 18)" font-size="9" font-family="HelveticaLTStd" font-weight="bold"><tspan y="25.87323" x="0 5.499 10.998 16.497 21.501 24.498 27 32.499 37.998 43.002004 45.504 48.006 53.505 58.509004 63.513006 68.517009 72.018009 74.520008 80.019008 83.01601 85.518009 91.017009">Functional description</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 734.93869)" font-size="10" font-family="HelveticaLTStd" font-weight="bold"><tspan y="8.59766" x="130.006 137.226 142.786 148.346 151.12599 157.79599 163.90599 170.01599 173.346 179.456 185.01599 193.90599 196.68599 199.46599 205.02599 207.80599 215.02599 220.58599 223.91599 229.47599 233.36598 238.92598 245.03598 250.59598 256.15599 258.93598 267.26597 272.82597 278.93595 285.04594 290.60594 293.38594 296.16593 298.94593 306.16593 311.72593 317.28593 320.06593 322.84593 328.4059 331.1859 336.7459 342.8559 348.96589 351.74589 357.30589 362.86589 368.42588">K60 Sub-Family Reference Manual, Rev. 2 Jun 2012</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 54 751.756)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="0 5.0040009 10.008001">342</tspan></text>
<text fill="#ff0000" xml:space="preserve" transform="matrix(1 0 0 1 220.32 751.756)" font-size="10" font-family="HelveticaLTStd" font-weight="bold"><tspan y="8.59766" x="58.45 65.12 69.01 74.57 77.35 80.13 89.02 91.799999 97.909999 103.46999 107.35999">Preliminary</tspan></text>
<text xml:space="preserve" transform="matrix(1 0 0 1 391.68 751.756)" font-size="9" font-family="HelveticaLTStd"><tspan y="7.83789" x="44.775 50.274003 53.271005 58.275007 63.279008 67.77901 72.27901 77.283008 79.281009 84.285 86.787 92.79 97.794 105.291 107.289 111.789 116.793 121.797 126.800998 131.805 136.305 138.80699 143.81099 146.80799 149.30998 151.81198 154.31398 159.31798 163.81798">Freescale Semiconductor, Inc.</tspan></text>
<text fill="#ff0000" xml:space="preserve" transform="matrix(1 0 0 1 54 763.756)" font-size="10" font-family="HelveticaLTStd" font-weight="bold"><tspan y="8.59766" x="180.87 188.65 194.20999 200.31999 205.87999 209.76999 215.32999 218.10999 220.88999 228.10999 234.21999 239.77999 242.55998 248.66999 254.22998 259.78999 265.34999 268.12998 270.90998 277.01997 280.34996 286.45994 290.34996 299.23997 304.79997 308.12995 310.90995 317.01994">General Business Information</tspan></text>
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