Merge branch 'dev'
This commit is contained in:
Daniel Rojas
commit
3ae3fff15b
@ -3,7 +3,6 @@ nodes:
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type: D-Sub
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gender: female
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pinout: [DCD, RX, TX, DTR, GND, DSR, RTS, CTS, RI]
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random: yes
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X2:
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type: Molex KK 254
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gender: female
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36
examples/ferrules.yml
Normal file
36
examples/ferrules.yml
Normal file
@ -0,0 +1,36 @@
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nodes:
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X1:
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type: D-Sub
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gender: female
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num_pins: 4
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X2:
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type: Molex KK 254
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gender: female
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num_pins: 3
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wires:
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W1:
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mm2: 0.25
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length: 0.2
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color_code: IEC
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num_wires: 10
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shield: true
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ferrules:
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F_test:
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type: crimp
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connections:
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-
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- X1: [1-3]
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- W1: [1-3]
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- X2: [1-3]
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-
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- X1: 4
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- W1: s
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-
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- F_test
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- W1: [4-10]
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-
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- W1: [10-4]
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- F_test
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164
src/wireviz.py
164
src/wireviz.py
@ -1,3 +1,5 @@
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from dataclasses import dataclass, field
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from typing import Any, List
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from graphviz import Graph
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COLOR_CODES = {'DIN': ['WH','BN','GN','YE','GY','PK','BU','RD','BK','VT'], # ,'GYPK','RDBU','WHGN','BNGN','WHYE','YEBN','WHGY','GYBN','WHPK','PKBN'],
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@ -8,14 +10,14 @@ COLOR_CODES = {'DIN': ['WH','BN','GN','YE','GY','PK','BU','RD','BK','VT'], # ,'G
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color_hex = {
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'BK': '#000000',
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'WH': '#ffffff',
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'GY': '#808080',
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'PK': '#ff80c0',
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'GY': '#999999',
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'PK': '#ff66cc',
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'RD': '#ff0000',
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'OG': '#ff8000',
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'YE': '#ffff00',
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'GN': '#00ff00',
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'GN': '#009900',
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'TQ': '#00ffff',
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'BU': '#0000ff',
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'BU': '#0066ff',
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'VT': '#8000ff',
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'BN': '#666600',
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}
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@ -57,11 +59,11 @@ class Harness:
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self.nodes = {}
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self.cables = {}
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def add_node(self, name, type=None, gender=None, show_name=True, num_pins=None, show_num_pins=True, pinout=None, ports_left=False, ports_right=False):
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self.nodes[name] = Node(name, type, gender, show_name, num_pins, show_num_pins, pinout, ports_left, ports_right)
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def add_node(self, name, *args, **kwargs):
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self.nodes[name] = Node(name, *args, **kwargs)
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def add_cable(self, name, mm2=None, awg=None, show_equiv=False, length=0, show_name=False, show_pinout=False, num_wires=None, show_num_wires=True, colors=None, color_code=None, shield=False):
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self.cables[name] = Cable(name, mm2, awg, show_equiv, length, show_name, show_pinout, num_wires, show_num_wires, colors, color_code, shield)
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def add_cable(self, name, *args, **kwargs):
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self.cables[name] = Cable(name, *args, **kwargs)
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def loop(self, node_name, from_pin, to_pin):
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self.nodes[node_name].loop(from_pin, to_pin)
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@ -82,38 +84,36 @@ class Harness:
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dot.attr('edge', style='bold', fontname=font)
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# prepare ports on connectors depending on which side they will connect
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for k in self.cables:
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c = self.cables[k]
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for k, c in self.cables.items():
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for x in c.connections:
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if x[1] is not None: # connect to left
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self.nodes[x[0]].ports_right = True
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if x[4] is not None: # connect to right
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self.nodes[x[3]].ports_left = True
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for k in self.nodes:
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n = self.nodes[k]
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for k, n in self.nodes.items():
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# a = attributes
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a = [n.type,
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n.gender,
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'{}-pin'.format(len(n.pinout)) if n.show_num_pins == True else '']
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'{}-pin'.format(len(n.pinout)) if n.show_num_pins else '']
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# p = pinout
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p = [[],[],[]]
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p[1] = list(n.pinout)
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for i,x in enumerate(n.pinout, 1):
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if n.ports_left == True:
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for i, x in enumerate(n.pinout, 1):
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if n.ports_left:
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p[0].append('<p{portno}l>{portno}'.format(portno=i))
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if n.ports_right == True:
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if n.ports_right:
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p[2].append('<p{portno}r>{portno}'.format(portno=i))
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# l = label
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l = [n.name if n.show_name == True else '', a, p]
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l = [n.name if n.show_name else '', a, p]
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dot.node(k, label=nested(l))
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if len(n.loops) > 0:
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dot.attr('edge',color='#000000')
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if n.ports_left == True:
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if n.ports_left:
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loop_side = 'l'
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loop_dir = 'w'
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elif n.ports_right == True:
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elif n.ports_right:
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loop_side = 'r'
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loop_dir = 'e'
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else:
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@ -122,24 +122,23 @@ class Harness:
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dot.edge('{name}:p{port_from}{loop_side}:{loop_dir}'.format(name=n.name, port_from=x[0], port_to=x[1], loop_side=loop_side, loop_dir=loop_dir),
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'{name}:p{port_to}{loop_side}:{loop_dir}'.format(name=n.name, port_from=x[0], port_to=x[1], loop_side=loop_side, loop_dir=loop_dir))
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for k in self.cables:
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c = self.cables[k]
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for k, c in self.cables.items():
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# a = attributes
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a = ['{}x'.format(len(c.colors)) if c.show_num_wires == True else '',
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'{} mm\u00B2{}'.format(c.mm2, ' ({} AWG)'.format(awg_equiv(c.mm2)) if c.show_equiv == True else '') if c.mm2 is not None else '',
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a = ['{}x'.format(len(c.colors)) if c.show_num_wires else '',
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'{} mm\u00B2{}'.format(c.mm2, ' ({} AWG)'.format(awg_equiv(c.mm2)) if c.show_equiv else '') if c.mm2 is not None else '',
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c.awg,
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'+ S' if c.shield == True else '',
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'+ S' if c.shield else '',
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'{} m'.format(c.length) if c.length > 0 else '']
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# p = pinout
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p = [[],[],[]]
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for i,x in enumerate(c.colors,1):
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for i, x in enumerate(c.colors,1):
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if c.show_pinout:
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p[0].append('<w{wireno}i>{wireno}'.format(wireno=i))
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p[1].append('{wirecolor}'.format(wirecolor=translate_color(x, self.color_mode)))
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p[2].append('<w{wireno}o>{wireno}'.format(wireno=i))
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else:
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p[1].append('<w{wireno}>{wirecolor}'.format(wireno=i,wirecolor=translate_color(x, self.color_mode)))
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if c.shield == True:
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if c.shield:
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if c.show_pinout:
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p[0].append('<wsi>')
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p[1].append('Shield')
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@ -147,7 +146,7 @@ class Harness:
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else:
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p[1].append('<ws>Shield')
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# l = label
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l = [c.name if c.show_name == True else '', a, p]
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l = [c.name if c.show_name else '', a, p]
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dot.node(k, label=nested(l))
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# connections
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@ -162,10 +161,10 @@ class Harness:
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dot.attr('edge',color='#000000')
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if x[1] is not None: # connect to left
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dot.edge('{from_name}:p{from_port}r'.format(from_name=x[0],from_port=x[1]),
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'{via_name}:w{via_wire}{via_subport}'.format(via_name=c.name, via_wire=x[2], via_subport='i' if c.show_pinout == True else ''))
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'{via_name}:w{via_wire}{via_subport}'.format(via_name=c.name, via_wire=x[2], via_subport='i' if c.show_pinout else ''))
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# self.nodes[x[0]].ports_right = True
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if x[4] is not None: # connect to right
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dot.edge('{via_name}:w{via_wire}{via_subport}'.format(via_name=c.name, via_wire=x[2], via_subport='o' if c.show_pinout == True else ''),
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dot.edge('{via_name}:w{via_wire}{via_subport}'.format(via_name=c.name, via_wire=x[2], via_subport='o' if c.show_pinout else ''),
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'{to_name}:p{to_port}l'.format(to_name=x[3], to_port=x[4]))
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# self.nodes[x[3]].ports_left = True
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@ -178,74 +177,73 @@ class Harness:
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d.render(filename=filename, directory=directory, view=view, cleanup=cleanup)
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d.save(filename='{}.gv'.format(filename), directory=directory)
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@dataclass
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class Node:
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name: str
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type: str = None
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gender: str = None
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num_pins: int = None
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pinout: List[Any] = field(default_factory=list)
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show_name: bool = False
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show_num_pins: bool = False
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def __init__(self, name, type=None, gender=None, show_name=True, num_pins=None, show_num_pins=True, pinout=None, ports_left=False, ports_right=False):
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self.name = name
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self.type = type
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self.gender = gender
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self.show_name = show_name
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self.show_num_pins = show_num_pins
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self.ports_left = ports_left
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self.ports_right = ports_right
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def __post_init__(self):
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self.ports_left = False
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self.ports_right = False
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self.loops = []
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if pinout is None:
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if num_pins is None:
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num_pins = 1
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self.pinout = ('',) * num_pins
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if self.pinout:
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if self.num_pins is not None:
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raise Exception('You cannot specify both pinout and num_pins')
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else:
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if num_pins is None:
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if pinout is None:
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raise Exception('Must provide num_pins or pinout')
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else:
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self.pinout = pinout
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if not self.num_pins:
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self.num_pins = 1
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self.pinout = ['',] * self.num_pins
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def loop(self, from_pin, to_pin):
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self.loops.append((from_pin, to_pin))
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@dataclass
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class Cable:
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name: str
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mm2: float = None
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awg: int = None
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show_equiv: bool = False
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length: float = 0
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num_wires: int = None
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shield: bool = False
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colors: List[Any] = field(default_factory=list)
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color_code: str = None
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show_name: bool = False
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show_pinout: bool = False
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show_num_wires: bool = True
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def __init__(self, name, mm2=None, awg=None, show_equiv=False, length=0, show_name=False, show_pinout=False, num_wires=None, show_num_wires=True, colors=None, color_code=None, shield=False):
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self.name = name
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if mm2 is not None and awg is not None:
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def __post_init__(self):
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if self.mm2 and self.awg:
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raise Exception('You cannot define both mm2 and awg!')
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self.mm2 = mm2
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self.awg = awg
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self.show_equiv = show_equiv
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self.length = length
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self.show_name = show_name
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self.show_pinout = show_pinout
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self.show_num_wires = show_num_wires
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self.shield = shield
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self.connections = []
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if color_code is None and colors is None:
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self.colors = ('',) * num_wires
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else:
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if colors is None: # no custom color pallet was specified
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if num_wires is None:
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raise Exception('Unknown number of wires')
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else:
|
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if color_code is None:
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raise Exception('No color code')
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# choose color code
|
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if color_code not in COLOR_CODES:
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raise Exception('Unknown color code')
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else:
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cc = COLOR_CODES[color_code]
|
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n = num_wires
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else: # custom color pallet was specified
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cc = colors
|
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if num_wires is None: # assume number of wires = number of items in custom pallet
|
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n = len(cc)
|
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else: # number of wires was specified
|
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n = num_wires
|
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|
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cc = tuple(cc)
|
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if n > len(cc):
|
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m = num_wires // len(cc) + 1
|
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cc = cc * int(m)
|
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self.colors = cc[:n]
|
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if self.num_wires: # number of wires explicitly defined
|
||||
if self.colors: # use custom color palette (partly or looped if needed)
|
||||
pass
|
||||
elif self.color_code: # use standard color palette (partly or looped if needed)
|
||||
if self.color_code not in COLOR_CODES:
|
||||
raise Exception('Unknown color code')
|
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self.colors = COLOR_CODES[self.color_code]
|
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else: # no colors defined, add dummy colors
|
||||
self.colors = [''] * self.num_wires
|
||||
|
||||
# make color code loop around if more wires than colors
|
||||
if self.num_wires > len(self.colors):
|
||||
m = self.num_wires // len(self.colors) + 1
|
||||
self.colors = self.colors * int(m)
|
||||
# cut off excess after looping
|
||||
self.colors = self.colors[:self.num_wires]
|
||||
|
||||
else: # num_wires implicit in length of color list
|
||||
if not self.colors:
|
||||
raise Exception('Unknown number of wires. Must specify num_wires or colors (implicit length)')
|
||||
self.num_wires = len(self.colors)
|
||||
|
||||
def connect(self, from_name, from_pin, via_pin, to_name, to_pin):
|
||||
from_pin = int2tuple(from_pin)
|
||||
|
||||
@ -1,10 +1,12 @@
|
||||
import yaml
|
||||
import wireviz
|
||||
|
||||
filename = '../examples/example1.yml'
|
||||
filename = '../examples/example2.yml'
|
||||
filename = '../examples/ferrules.yml'
|
||||
|
||||
def check_designators(what, where):
|
||||
for i,x in enumerate(what):
|
||||
for i, x in enumerate(what):
|
||||
# print('Looking for {} in {}'.format(x,where[i]))
|
||||
if x not in input[where[i]]:
|
||||
return False
|
||||
@ -45,24 +47,33 @@ with open(filename, 'r') as stream:
|
||||
print(exc)
|
||||
|
||||
h = wireviz.Harness()
|
||||
# add nodes
|
||||
for k, o in input['nodes'].items():
|
||||
h.add_node(k, type=o.get('type'),
|
||||
gender=o.get('gender'),
|
||||
num_pins=o.get('num_pins'),
|
||||
pinout=o.get('pinout'))
|
||||
# add wires
|
||||
for k, o in input['wires'].items():
|
||||
h.add_cable(k, mm2=o.get('mm2'),
|
||||
awg=o.get('awg'),
|
||||
length=o.get('length'),
|
||||
num_wires=o.get('num_wires'),
|
||||
colors=o.get('colors'),
|
||||
color_code=o.get('color_code'),
|
||||
shield=o.get('shield'))
|
||||
|
||||
# add items
|
||||
sections = ['nodes','wires','ferrules','connections']
|
||||
types = [dict, dict, dict, list]
|
||||
for sec, ty in zip(sections, types):
|
||||
if sec in input and type(input[sec]) == ty:
|
||||
if len(input[sec]) > 0:
|
||||
if ty == dict:
|
||||
for k, o in input[sec].items():
|
||||
if sec == 'nodes':
|
||||
h.add_node(name=k, **o)
|
||||
elif sec == 'wires':
|
||||
h.add_cable(name=k, **o)
|
||||
elif sec == 'ferrules':
|
||||
pass
|
||||
else:
|
||||
print('{} section empty'.format(sec))
|
||||
else:
|
||||
print('No {} section found'.format(sec))
|
||||
if ty == dict:
|
||||
input[sec] = {}
|
||||
elif ty == list:
|
||||
input[sec] = []
|
||||
|
||||
# add connections
|
||||
conlist = input['connections']
|
||||
for con in conlist:
|
||||
ferrule_counter = 0
|
||||
for con in input['connections']:
|
||||
if len(con) == 3: # format: connector -- wire -- conector
|
||||
|
||||
for c in con:
|
||||
@ -89,38 +100,79 @@ for con in conlist:
|
||||
elif len(con) == 2:
|
||||
|
||||
for c in con:
|
||||
if len(list(c.keys())) != 1: # check that each entry in con has only one key, which is the designator
|
||||
raise Exception('Too many keys')
|
||||
if type(c) is dict:
|
||||
if len(list(c.keys())) != 1: # check that each entry in con has only one key, which is the designator
|
||||
raise Exception('Too many keys')
|
||||
|
||||
# hack to make the format for ferrules compatible with the formats for connectors and wires
|
||||
if type(con[0]) == str:
|
||||
name = con[0]
|
||||
con[0] = {}
|
||||
con[0][name] = name
|
||||
if type(con[1]) == str:
|
||||
name = con[1]
|
||||
con[1] = {}
|
||||
con[1][name] = name
|
||||
|
||||
from_name = list(con[0].keys())[0]
|
||||
to_name = list(con[1].keys())[0]
|
||||
to_name = list(con[1].keys())[0]
|
||||
|
||||
n_w = check_designators([from_name, to_name],('nodes','wires'))
|
||||
w_n = check_designators([from_name, to_name],('wires','nodes'))
|
||||
n_n = check_designators([from_name, to_name],('nodes','nodes'))
|
||||
|
||||
if not n_w and not w_n and not n_n:
|
||||
|
||||
f_w = check_designators([from_name, to_name],('ferrules','wires'))
|
||||
w_f = check_designators([from_name, to_name],('wires','ferrules'))
|
||||
|
||||
if not n_w and not w_n and not n_n and not f_w and not w_f:
|
||||
raise Exception('Wrong designators')
|
||||
|
||||
from_pins = expand(con[0][from_name])
|
||||
to_pins = expand(con[1][to_name])
|
||||
|
||||
if len(from_pins) != len(to_pins):
|
||||
raise Exception('List length mismatch')
|
||||
if n_w or w_n or n_n:
|
||||
if len(from_pins) != len(to_pins):
|
||||
raise Exception('List length mismatch')
|
||||
|
||||
if n_w == True or w_n == True:
|
||||
if n_w or w_n:
|
||||
for (from_pin, to_pin) in zip(from_pins, to_pins):
|
||||
if n_w:
|
||||
h.connect(from_name, from_pin, to_name, to_pin, None, None)
|
||||
else: # w_n
|
||||
h.connect(None, None, from_name, from_pin, to_name, to_pin)
|
||||
elif n_n == True:
|
||||
elif n_n:
|
||||
con_name = list(con[0].keys())[0]
|
||||
from_pins = expand(con[0][from_name])
|
||||
to_pins = expand(con[1][to_name])
|
||||
|
||||
for (from_pin, to_pin) in zip(from_pins, to_pins):
|
||||
h.loop(con_name, from_pin, to_pin)
|
||||
if f_w or w_f:
|
||||
from_pins = expand(con[0][from_name])
|
||||
to_pins = expand(con[1][to_name])
|
||||
|
||||
if f_w:
|
||||
ferrule_name = from_name
|
||||
wire_name = to_name
|
||||
wire_pins = to_pins
|
||||
else:
|
||||
ferrule_name = to_name
|
||||
wire_name = from_name
|
||||
wire_pins = from_pins
|
||||
|
||||
ferrule_params = input['ferrules'][ferrule_name]
|
||||
for wire_pin in wire_pins:
|
||||
ferrule_counter = ferrule_counter + 1
|
||||
ferrule_id = 'F{}'.format(ferrule_counter)
|
||||
h.add_node(ferrule_id, **ferrule_params)
|
||||
|
||||
if f_w:
|
||||
h.connect(ferrule_id, 1, wire_name, wire_pin, None, None)
|
||||
else:
|
||||
h.connect(None, None, wire_name, wire_pin, ferrule_id, 1)
|
||||
|
||||
|
||||
else:
|
||||
raise Exception('Wrong number of connection parameters')
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user