diff --git a/idea/example1.dot b/idea/example1.dot index 5467348..fc388f5 100644 --- a/idea/example1.dot +++ b/idea/example1.dot @@ -1,18 +1,29 @@ +// Graph generated by WireViz +// https://github.com/formatc1702/WireViz +// Daniel Rojas - 2020 + digraph G { graph [rankdir = LR, ranksep=2, fontname = "arial"]; edge [arrowhead=none, fontname = "arial"]; node [shape=record, style=rounded, fontname = "arial"]; - X1[label="X1 | D-Sub DE-9 | female | {{DCD|RX|TX|DTR|GND|DSR|RTS|CTS|RI} | {1|2|3|4|5|6|7|8|9}} "]; - X2[label="X2 | Molex KK 254 6-pin | female | {{1|2|3|4|5|6} | {GND|RX|TX|NC|OUT|IN}}"]; - W1[label="W1 | 3x 0,25 mm² shielded | 0.2 m | {{1|2|3|}|{WH|BN|GN|Shield}|{1|2|3|}}}"]; +X1[label="X1 | {D-Sub|female|9-pin} | {{DCD|RX|TX|DTR|GND|DSR|RTS|CTS|RI} | {1|2|3|4|5|6|7|8|9}}}"] + +X2[label="X2 | {Molex KK 254|female|6-pin} | {{1|2|3|4|5|6} | {GND|RX|TX|NC|OUT|IN}}}"] + +{edge[style=bold] +X2:p5:w -> X2:p6:w +} + +W1[label="W1 | {3x|0.25 mm²| + S|0.2 m} | {{1|2|3|} | {WH|BN|GN|Shield} | {1|2|3|}}}"] + +{edge[style=bold] +{edge[color="#000000:#ffffff:#000000"] X1:p5 -> W1:w1i; W1:w1o -> X2:p1} +{edge[color="#000000:#666600:#000000"] X1:p2 -> W1:w2i; W1:w2o -> X2:p3} +{edge[color="#000000:#00ff00:#000000"] X1:p3 -> W1:w3i; W1:w3o -> X2:p2} +{X1:p5 -> W1:wsi; } +} + - {edge[style=bold] - {edge[color="#000000:#ffffff:#000000"] X1:p5 -> W1:w1i; W1:w1o -> X2:p1; } - {edge[color="#000000:#666600:#000000"] X1:p2 -> W1:w2i; W1:w2o -> X2:p3; } - {edge[color="#000000:#00ff00:#000000"] X1:p3 -> W1:w3i; W1:w3o -> X2:p2; } - X1:p5 -> W1:wsi; - X2:p5:w -> X2:p6:w; - } } diff --git a/idea/example1.png b/idea/example1.png index 13db19a..f8ecb55 100644 Binary files a/idea/example1.png and b/idea/example1.png differ diff --git a/idea/example1.wire b/idea/example1.wire index 9a90895..5cdb78e 100644 --- a/idea/example1.wire +++ b/idea/example1.wire @@ -1,27 +1,23 @@ // define connectors -X1[type="D-Sub DE-9", - subtype="female", - num_pins=9, - pin_labels="DCD|RX|TX|DTR|GND|DSR|RTS|CTS|RI", - position=L - ] +X1 [type="D-Sub", + gender="female", + pin_labels="DCD|RX|TX|DTR|GND|DSR|RTS|CTS|RI", + ] -X2[type="Molex KK 254 6-pin", - subtype="female", - num_pins=6, - pin_labels="GND|RX|TX|NC|OUT|IN", - position=R - ] +X2 [type="Molex KK 254", + gender="female", + pin_labels="GND|RX|TX|NC|OUT|IN", + ] // define wire -W1[type="3x 0,25 mm² shielded", - length="0.2m", - num_wires=3, - colors="din47100", - shield=true - ] +W1 [mm2=0.25, + length=0.2, + num_wires=3, + colors="din47100", + shield=true + ] // define connections diff --git a/idea/example2.dot b/idea/example2.dot index 01665cb..fa191bd 100644 --- a/idea/example2.dot +++ b/idea/example2.dot @@ -1,54 +1,53 @@ -graph G { +// Graph generated by WireViz +// https://github.com/formatc1702/WireViz +// Daniel Rojas - 2020 + +digraph G { graph [rankdir = LR, ranksep=2, fontname = "arial"]; edge [arrowhead=none, fontname = "arial"]; node [shape=record, style=rounded, fontname = "arial"]; - X1[label="X1 | Molex KK 254 8-pin | female | {{GND|+5V|SCL|SDA|MISO|MOSI|SCK|N/C} | {1|2|3|4|5|6|7|8}} "]; - X2[label="X2 | Molex KK 254 4-pin | female | {{1|2|3|4} | {GND|+5V|SCL|SDA}}"]; - X3[label="X3 | Molex KK 254 4-pin | female | {{1|2|3|4} | {GND|+5V|SCL|SDA}}"]; - X4[label="X4 | Molex KK 254 5-pin | female | {{1|2|3|4|5} | {GND|+12V|MISO|MOSI|SCK}}"]; - X5[label="X5 | Molex Micro-Fit 2-pin | male | {{GND|+12V} | {1|2}} "]; - W1[label="{4x | 0,14 mm² | 0.2 m} | BK|RD|YE|GN"]; - W2[label="{4x | 0,14 mm² | 0.2 m} | BK|RD|YE|GN"]; - W3[label="{4x | 0,14 mm² | 0.2 m} | BK|BU|OG|VT}"]; - W4[label="{2x | 0,5 mm² | 0.35 m} | BK|RD"]; +X1[label="X1 | {Molex KK 254|female|8-pin} | {{GND|+5V|SCL|SDA|MISO|MOSI|SCK|N/C} | {1|2|3|4|5|6|7|8}}}"] - {edge[style=bold] - // GND - {edge[color="#000000:#000000:#000000"] - X1:p1 -- W1:w1 -- X2:p1; - X1:p1 -- W2:w1 -- X3:p1; - X1:p1 -- W3:w1 -- X4:p1; - X5:p1 -- W4:W1 -- X4:p1; - } +X2[label="X2 | {Molex KK 254|female|4-pin} | {{1|2|3|4} | {GND|+5V|SCL|SDA}}}"] - // +5V - {edge[color="#000000:#ff0000:#000000"] - X1:p2 -- W1:w2 -- X2:p2; - X1:p2 -- W2:w2 -- X3:p2; - } +X3[label="X3 | {Molex KK 254|female|4-pin} | {{1|2|3|4} | {GND|+5V|SCL|SDA}}}"] - // +12V - {edge[color="#000000:#ff0000:#000000"] X5:p2 -- W4:w2 -- X4:p2; } +X4[label="X4 | {Molex KK 254|female|5-pin} | {{1|2|3|4|5} | {GND|+12V|MISO|MOSI|SCK}}}"] - // SCL - {edge[color="#000000:#ffff00:#000000"] - X1:p3 -- W1:w3 -- X2:p3; - X1:p3 -- W2:w3 -- X3:p3; - } +X5[label="X5 | {Molex Micro-Fit|male|2-pin} | {{GND|+12V} | {1|2}}}"] + +W1[label="{4x|0.14 mm²|0.2 m} | {{BK|RD|YE|GN}}}"] + +{edge[style=bold] +{edge[color="#000000:#000000:#000000"] X1:p1 -> W1:w1; W1:w1 -> X2:p1} +{edge[color="#000000:#ff0000:#000000"] X1:p2 -> W1:w2; W1:w2 -> X2:p2} +{edge[color="#000000:#ffff00:#000000"] X1:p3 -> W1:w3; W1:w3 -> X2:p3} +{edge[color="#000000:#00ff00:#000000"] X1:p4 -> W1:w4; W1:w4 -> X2:p4} +} +W2[label="{4x|0.14 mm²|0.2 m} | {{BK|RD|YE|GN}}}"] + +{edge[style=bold] +{edge[color="#000000:#000000:#000000"] X1:p1 -> W2:w1; W2:w1 -> X3:p1} +{edge[color="#000000:#ff0000:#000000"] X1:p2 -> W2:w2; W2:w2 -> X3:p2} +{edge[color="#000000:#ffff00:#000000"] X1:p3 -> W2:w3; W2:w3 -> X3:p3} +{edge[color="#000000:#00ff00:#000000"] X1:p4 -> W2:w4; W2:w4 -> X3:p4} +} +W3[label="{4x|0.14 mm²|0.2 m} | {{BK|BU|OG|VT}}}"] + +{edge[style=bold] +{edge[color="#000000:#000000:#000000"] X1:p1 -> W3:w1; W3:w1 -> X4:p1} +{edge[color="#000000:#0000ff:#000000"] X1:p5 -> W3:w2; W3:w2 -> X4:p3} +{edge[color="#000000:#ff8000:#000000"] X1:p6 -> W3:w3; W3:w3 -> X4:p4} +{edge[color="#000000:#8000ff:#000000"] X1:p7 -> W3:w4; W3:w4 -> X4:p5} +} +W4[label="{2x|0.5 mm²|0.35 m} | {{BK|RD}}}"] + +{edge[style=bold] +{edge[color="#000000:#000000:#000000"] X5:p1 -> W4:w1; W4:w1 -> X4:p1} +{edge[color="#000000:#ff0000:#000000"] X5:p2 -> W4:w2; W4:w2 -> X4:p2} +} - // SDA - {edge[color="#000000:#008000:#000000"] - X1:p4 -- W1:w4 -- X2:p4; - X1:p4 -- W2:w4 -- X3:p4; - } - // SPI - {edge[color="#000000:#0080ff:#000000"] X1:p5 -- W3:w2 -- X4:p3; } - {edge[color="#000000:#ff8000:#000000"] X1:p6 -- W3:w3 -- X4:p4; } - {edge[color="#000000:#8000ff:#000000"] X1:p7 -- W3:w4 -- X4:p5; } - - // +12V - } } diff --git a/idea/example2.png b/idea/example2.png index 22885a4..79d9131 100644 Binary files a/idea/example2.png and b/idea/example2.png differ diff --git a/readme.md b/readme.md index 6cb0dfa..3f9e46a 100644 --- a/readme.md +++ b/readme.md @@ -26,24 +26,20 @@ WireViz input file: // define connectors - X1 [type="D-Sub DE-9", - subtype="female", - num_pins=9, + X1 [type="D-Sub", + gender="female", pin_labels="DCD|RX|TX|DTR|GND|DSR|RTS|CTS|RI", - position=L ] - X2 [type="Molex KK 254 6-pin", - subtype="female", - num_pins=6, + X2 [type="Molex KK 254", + gender="female", pin_labels="GND|RX|TX|NC|OUT|IN", - position=R ] // define wire - W1 [type="3x 0,25 mm² shielded", - length="0.2m", + W1 [mm2=0.25, + length=0.2, num_wires=3, colors="din47100", shield=true @@ -68,18 +64,24 @@ GraphViz code generated by parser: edge [arrowhead=none, fontname = "arial"]; node [shape=record, style=rounded, fontname = "arial"]; - X1[label="X1 | D-Sub DE-9 | female | {{DCD|RX|TX|DTR|GND|DSR|RTS|CTS|RI} | {1|2|3|4|5|6|7|8|9}} "]; - X2[label="X2 | Molex KK 254 6-pin | female | {{1|2|3|4|5|6} | {GND|RX|TX|NC|OUT|IN}}"]; + X1[label="X1 | {D-Sub DE-9|female|9-pin} | {{DCD|RX|TX|DTR|GND|DSR|RTS|CTS|RI} | {1|2|3|4|5|6|7|8|9}}}"] + + X2[label="X2 | {Molex KK 254|female|6-pin} | {{1|2|3|4|5|6} | {|||||}}}"] + + {edge[style=bold] + X2:p5:w -> X2:p6:w + } + + W1[label="W1 | {3x|0.25 mm²| + S|0.2 m} | {{1|2|3|} | {WH|BN|GN|Shield} | {1|2|3|}}}"] + + {edge[style=bold] + {edge[color="#000000:#ffffff:#000000"] X1:p5 -> W1:w1i; W1:w1o -> X2:p1} + {edge[color="#000000:#666600:#000000"] X1:p2 -> W1:w2i; W1:w2o -> X2:p3} + {edge[color="#000000:#00ff00:#000000"] X1:p3 -> W1:w3i; W1:w3o -> X2:p2} + {X1:p5 -> W1:wsi; } + } - W1[label="W1 | 3x 0,25 mm² shielded | 0.2 m | {{1|2|3|}|{WH|BN|GN|Shield}|{1|2|3|}}}"]; - {edge[style=bold] - {edge[color="#000000:#ffffff:#000000"] X1:p5 -> W1:w1i; W1:w1o -> X2:p1; } - {edge[color="#000000:#666600:#000000"] X1:p2 -> W1:w2i; W1:w2o -> X2:p3; } - {edge[color="#000000:#00ff00:#000000"] X1:p3 -> W1:w3i; W1:w3o -> X2:p2; } - X1:p5 -> W1:wsi; - X2:p5:w -> X2:p6:w; - } } [Example 2](idea/example2.dot)